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bq28z560-r1 www.ti.com slusbd3 ? april 2013 bq28z560-r1 single cell li-ion battery gas gauge and protection check for samples: bq28z560-r1 1 features ? firmware control of discharge fet ? sha-1/hmac battery authentication 23 ? a comprehensive single cell li-ion battery manager integrates all essential functions: ? i 2 c? communications interface or hdq single wire ? gas gauge ? 12-pin, 2.5-mm x 4.0-mm son package ? low-side n-ch fet protection control ? jeita/enhanced charging applications ? authentication ? tablet pcs ? impedance track? gas gauging ? slates ? protection functions help to prevent: ? digital still and video cameras ? short-circuit ? handheld terminals ? overcurrent charge and discharge ? mp3 or multimedia players ? overvoltage charge (overcharge) ? undervoltage (over-discharge) description the texas instruments bq28z560-r1 device is a battery gas gauge with current and voltage protection, and secure, sha-1/hmac authentication for single-cell li-ion battery packs. designed for battery pack integration, the bq28z560-r1 requires host microcontroller firmware support for implementation. a system processor communicates with the bq28z560-r1 using one of two options: an i 2 c? serial interface or an hdq single-wire configuration to obtain remaining battery capacity, system run-time predictions, and other critical battery information. the bq28z560-r1 uses the accurate texas instruments impedance track? gas gauging algorithm to report the status of the cell. the gauge provides information such as state-of-charge (%), run-time to empty (min.), charge time to full (min.), battery voltage (v), and pack temperature (c). the bq28z560-r1 features integrated support for secure battery pack authentication, using the sha-1/hmac authentication algorithm. 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 impedance track is a trademark of texas instruments. 3 i 2 c is a trademark of nxp b.v. corporation. production data information is current as of publication date. copyright ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. ordering information (1) t a part number package tape and reel quantity bq28z560-r1drzr 3000 12-pin, 2.5-mm 4.0-mm ?40c to 85c son bq28z560-r1drzt 250 (1) for the most current package and ordering information, see the package option addendum at the end of this document, or visit the device product folder on ti.com ( www.ti.com ). thermal information bq28z560-r1 thermal metric (1) son units 12 pins ja junction-to-ambient thermal resistance (2) 186.4 jc(top) junction-to-case(top) thermal resistance (3) 90.4 jb junction-to-board thermal resistance (4) 110.7 c/w jt junction-to-top characterization parameter (5) 96.7 jb junction-to-board characterization parameter (6) 90 jc(bottom) junction-to-case(bottom) thermal resistance (7) n/a (1) for more information about traditional and new thermal metrics, see the ic package thermal metrics application report, spra953 . (2) the junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a jedec-standard, high-k board, as specified in jesd51-7, in an environment described in jesd51-2a. (3) the junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. no specific jedec- standard test exists, but a close description can be found in the ansi semi standard g30-88. (4) the junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the pcb temperature, as described in jesd51-8. (5) the junction-to-top characterization parameter, jt , estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining ja , using a procedure described in jesd51-2a (sections 6 and 7). (6) the junction-to-board characterization parameter, jb , estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining ja , using a procedure described in jesd51-2a (sections 6 and 7). (7) the junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. no specific jedec standard test exists, but a close description can be found in the ansi semi standard g30-88. spacer 2 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 typical application figure 1. application?cfet figure 2. application?alert copyright ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: bq28z560-r1 dout cout vm bat vreg vss gpio scl ts srp srn vreg pack + p ack C celln cellp s s d 0.1 f 1 2 3 4 5 6 12 11 10 9 8 7 sda 10 m 100 100 0.1 0.1 0.1 0.1 510 100 sda scl fuse dsg chg 13 pwpd 100 3.3k vreg 100 5v 6 5v6 5v6 alert 5 m 5 m 0.47 f f f f f 100 100 100 dout cout vm bat vreg vss gpio scl ts srp srn vreg pack + pack C celln cellp s s d 1 2 3 4 5 6 12 11 10 9 8 7 sda 10 m 0.1 f 510 100 sda scl fuse dsg chg 13 pwpd 100 100 k 5v6 5v6 5k 12k vreg bc847bpdxv6 5 m 5 m 0.47 f 0.1 f 0.1 f 0.1 f 0.1 f 100 100 100 100 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com pin details table 1. pin descriptions pin pin i/o (1) description number name 1 dout ia the output of the gate drive for discharge fet 2 cout ia the output of the gate drive for charge fet analog input pin connected to the packn through a 510- resistor. overcurrent and short-circuit 3 vm ia protection circuits use the voltage across vm and vss to detect if excessive charge or discharge current is flowing through the protection fets. 4 bat ia cell voltage measurement input. adc input. connect a 0.1-f ceramic capacitor to vss. 5 vreg p 2.5-v output voltage of the internal integrated ldo. connect a 0.1-f ceramic capacitor to vss. 6 vss p device ground analog input pin connected to the internal coulomb counter where srp is nearest the cell? 7 srp ia connection. connect to a 5-m ? to 20-m ? sense resistor. analog input pin connected to the internal coulomb counter where srn is nearest the packn 8 srn ia connection. connect to a 5-m ? to 20-m ? sense resistor. 9 ts ia pack thermistor voltage sense (use 103at-type thermistor), adc input 10 sda i/o serial data interface for smbus 11 scl i serial clock interface for smbus 12 gpio i/o general purpose control output for configuration as cfet control or alert output or hdq interface 13 pwpd i/o thermal pad. connect to vss externally on pcb. (1) ia = input analog, oa = output analog, p = power connection 4 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 1 2 3 4 5 6 12 thermal pad 11 10 9 8 7 dout cout vm bat vreg vss gpio scl sda ts srn srp drz package (top view) not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 block diagram figure 3. block diagram absolute maximum ratings all voltages are referenced to the vss pin. over operating free-air temperature range (unless otherwise noted) (1) parameter value unit v bat input voltage, bat (pin 4) ?0.3 to 12 v v vm vm terminal voltage (pin 3) v bat ? 32 to v bat + 0.3 v v cout cout terminal input voltage (pin 2) v bat ? 32 to v bat + 0.3 v v dout dout terminal input voltage (pin 1) v ss ? 0.3 to v bat + 0.3 v v iod all other pins (pins 5, 7, 8, 9, and 12) ?0.3 to 6 v v sdata sda (pin 10) v ss ? 0.3 to v bat + 0.3 v v sclk scl (pin 11) v ss ? 0.3 to v bat + 0.3 v esd human body model 2 kv esd machine model 200 v t a operating free-air temperature range ?40c to 85 c t stg storage temperature range ?65c to 150 c (1) stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditions? is not implied. exposure to absolute?maximum?rated conditions for extended periods may affect device reliability. copyright ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: bq28z560-r1 input / output oscillator system clock linear regulator 2 .5 v coolrisc cpu program memory 16 k x 22 flash and 6 k x 22 mask rom data memory 1 k x 8 sram and 1k x 8 flash communications i 2 c ( slave) peripherals interrupt controller analog front end delta- sigma adc and integrating coulomb counter dmaddr (16-bit) data ( 8-bit) pmaddr (15-bit) pminst (22 - bit ) system clocks srp srn system i/ o ( 13 -bit) ad0C 3 (rc0C 3 ) data event (ra 0 ) vss vreg reset * sda scl ts bat bat vm bat vss sda test oscillator protection logic control srn over discharge comparator overcharge comparator short circuit comparator overload comparator overcharge current comparator test vss gpio dout cout vss bat vm vreg 3k 0.1 f 0 . 1 0.1 f 0.47 f 10k 100 100 10 m 0.1 f 0.1 f 510 0 .1 f 0 . 1 f 100 100 100 100 5 v 6 5v6 + pack + p ack C sda scl li-ion cell f not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com recommended operating conditions t a = 25oc, v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit v bat bat pin 4 input 2.45 5.5 v gas gauge in normal mode. i load > sleep normal operating mode 141 current gas gauge in sleep mode. i load < sleep low-power 70 current i bat gas gauge in fullsleep mode. i load < a sleep 31 sleep current gas gauge in hibernate mode. i load < hibernate 16 hibernate current shutdown gas gauge in shutdown mode 1 i ss maximum current 20 ma c reg regulator output capacitor 0.1 f c bat v bat input filter capacitor 0.1 f resistor from vm to r packn 510 packn r pu_ sda pull up resistor 1.3 3.3 k v pu_ sda pull up voltage 1.8 4.2 v sda, scl or gpio input v il_ ?0.3 0.6 v voltage low sda, scl or gpio input v ih_ 1.2 6 v voltage high sda or gpio output v ol_ i ol = 3 ma (open drain) 0 0.4 v voltage low capacitance for each i/o c i sda and scl input capacitance 10 pf pin power up communication t pucd 250 ms delay input voltage range (srp, v ai2 v ss ? 0.25 0.25 v srn) battery protection t a = ?40 to +85oc, v bat =1.5 v to 5.5 v; typical values stated, where t a = 25oc and v bat =3.6 v (unless otherwise noted) parameter test condition min nom max unit minimum operating voltage for v st v st = v bat ? vm 1.2 v 0 v charging r short overcurrent release resistance v bat = 4.0 v, vm = 1 v 30 50 100 k r ds ds pin pull-down resistance v bat = 4.0 v 6.5 13.0 26.0 k cout low level output voltage v ol1 i ol = 30 a, v bat = 4.5 v 0.4 0.5 v (referenced to vm) cout high level output voltage v oh1 i oh = 30 a, v bat = 4.0 v 3.4 3.7 v (referenced to vm) dout low level output voltage v ol2 i ol = 30 a, v bat = 2.0 v 0.2 0.5 v (referenced to vss) dout high level output voltage v oh2 i oh = 30 a, v bat = 4.0 v 3.4 3.7 v (referenced to vss) t a = 25 ? c detection voltage 4.230 4.250 4.270 v det1 overcharge detection t a = ?10 to 60 ? c 4.225 4.250 4.275 v t a = ?40 to 85 ? c 4.200 4.250 4.300 t a = 25 ? c 4.040 4.070 4.100 v rel1 overcharge release voltage t a = ?10 to 60 ? c 4.025 4.070 4.115 v t a = ?40 to 85 ? c 4.010 4.070 4.130 6 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 battery protection (continued) t a = ?40 to +85oc, v bat =1.5 v to 5.5 v; typical values stated, where t a = 25oc and v bat =3.6 v (unless otherwise noted) parameter test condition min nom max unit t det1 overcharge detection delay time v bat = 3.5 v 4.5 v 0.60 1.00 1.50 s t rel1 overcharge release delay time v bat = 4.5 v 3.5 v 4.8 8.0 12.0 ms ta = 25 ? c 2.265 2.300 2.335 v det2 over-discharge detection voltage ta = ?10 to 60 ? c 2.242 2.300 2.358 v ta = ?40 to 85 ? c 2.220 2.300 2.380 over-discharge detection delay t det2 v bat = 3.5 v 2.00 v 14.4 24.0 36.0 ms time over-discharge release delay v bat = 3 v t rel2 2.4 4.0 6.0 ms time vm = 3 v 0 v overcurrent detection voltage on v det3 v bat = 4 v 0.130 0.150 0.170 v discharge overcurrent detection voltage on v det4 v bat = 4 v ?0.137 ?0.112 ?0.087 v charging v bat = 3 v t ocd overcurrent detection delay time 7.2 12.0 18.0 ms vm = 0 v 1v v bat = 3 v t ocr overcurrent release delay time 2.4 4.0 6.0 ms vm = 3 v 0 v v bat ? v short short detection voltage v bat = 4 v, r packn = 510 v bat ? 1.2 v bat ? 0.6 v 0.9 v bat = 3 v t short short detection delay time 200 400 800 s vm = 0v 3 v voltage regulator t a = ?40 to +85oc, v bat =1.5 v to 5.5 v; typical values stated, where t a = 25oc and v bat =3.6 v (unless otherwise noted) parameter test conditions min typ max unit 2.7 v < v bat < 5.5 v, i out = 16 ma 2.45 2.50 2.55 v v reg output voltage 2.45 v < v bat < 2.7 v, i out = 3 ma 2.40 v line line regulation 2.7 v < v bat < 5.5 v, i out = 16 ma 100 200 mv v reg = 2.45 v, 100 a < i out < 3 ma 30 50 v load load regulation mv v bat = 2.7 v, 3 ma < i out < 16 ma 30 50 v bat = 2.45 v, i out = 3 ma 30 50 vdo dropout voltage mv v bat = 2.7 v, i out = 16 ma 30 50 output voltage temperature v reg / t v bat = 3.5 v, i out = 100 a 100 ppm/c coefficient v bat = 3.5 v, i reg = 2.0 v 16 130 v line current limit ma v bat = 3.5 v, i reg = 0 v 10 35 60 v off regulator off voltage 7.0 8.0 9.0 v v bat = 3.6 v 5.5 v, r load = 100 t voff regulator off voltage delay time v reg = 2.5 v 2.3 v, c load = 0.1 f, 50 100 s t a = 25c power-on reset t a = ?40 to +85oc; typical values at t a = 25oc (unless otherwise noted) parameter test conditions min typ max unit positive-going battery voltage input v it+ no external loading on v reg 2.125 2.200 2.275 v at v reg v hys no external loading on v reg 75 125 175 mv copyright ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com internal temperature sensor characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit g temp temperature sensor voltage gain ?2.0 mv/c high frequency oscillator t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit f (osc) operating frequency 2.097 mhz t a = 0c to 60c ?2.0 0.38 2.0 % f (eio) frequency error (1) , (2) t a = ?20c to 70c ?3.0 0.38 3.0 % t a = ?40c to 85c ?4.5 0.38 4.5 % t (sxo) start-up time (3) 2.5 5 ms (1) the frequency error is measured from 2.097 mhz. (2) the frequency drift is included and measured from the trimmed frequency at v cc = 2.5 v, t a = 25c. (3) the startup time is defined as the time it takes for the oscillator output frequency to be 3%. low frequency oscillator t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit f (losc) operating frequency 32.768 khz t a = 0c to 60c ?1.5 0.25 1.5 % f (leio) frequency error (1) , (2) t a = ?20c to 70c ?2.5 0.25 2.5 % t a = ?40c to 85c ?4.0 0.25 4.0 % t (lsxo) start-up time (3) 500 s (1) the frequency drift is included and measured from the trimmed frequency at v cc = 2.5 v, t a = 25c. (2) the frequency error is measured from 32.768 khz. (3) the startup time is defined as the time it takes for the oscillator output frequency to be 3%. integrating adc (coulomb counter) characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit input voltage range, v (srn) and v in(sr) vsr = v (srn) ? v (srp) ?0.125 0.125 v v (srp) conversion time single conversion 1 s t conv(sr) resolution 14 15 bits v os(sr) input offset 10 v inl integral non-linearity error 0.007 0.034 fsr z in(sr) effective input resistance (1) 2.5 m ? i lkg(sr) input leakage current (1) 0.3 a (1) specified by design. not production tested. adc (temperature and cell voltage) characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit v in(adc) input voltage range ?0.2 1 v conversion time 125 ms t conv(adc) resolution 14 15 bits v os(adc) input offset 1 mv 8 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 adc (temperature and cell voltage) characteristics (continued) t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit z (adc1) effective input resistance (ts) (1) 8 m ? effective input resistance (bat) (1) bq28z560-r1 not measuring cell voltage 8 m ? z (adc2) bq28z560-r1 measuring cell voltage 100 k? i lkg(adc) input leakage current (1) 0.3 a (1) specified by design. not production tested. data flash memory characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted) parameter test conditions min typ max unit data retention (1) 10 years t dr flash programming write-cycles (1) 20,000 cycles t wordprog word programming time (1) 2 ms i ccprog flash-write supply current (1) 5 10 ma (1) specified by design. not production tested. hdq communication timing characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted). capacitance on gpio is 10 pf unless otherwise specified (1) . parameter test conditions min typ max unit t (cych) cycle time, host to bq28z560-r1 190 s t (cycd) cycle time, bq28z560-r1 to host 190 205 250 s t (hw1) host sends 1 to bq28z560-r1 0.5 50 s t (dw1) bq28z560-r1 sends 1 to host 32 50 s t (hw0) host sends 0 to bq28z560-r1 86 145 s t (dw0) bq28z560-r1 sends 0 to host 80 145 s response time, bq28z560-r1 to t (rsps) 190 950 s host t (b) break time 190 s t (br) break recovery time 40 s hdq line rising time to logic 1 t (rise) 950 ns (1.2 v) (1) parameters specified by worst-case test program execution in fast mode. figure 4. hdq timing copyright ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: bq28z560-r1 t (b) t (br) t (hw1) t (hw0) t (cych) t (dw1) t (dw t (cycd) break 7-bit address 8-bit data (a) break and break recovery (c) host transmitted bit (d) gauge transmitted bit (e) gauge to host response 1.2v t (rise) (b) hdq line rise time 1 - bit r/w t (rsps) 0) not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com i 2 c serial communication timing characteristics t a = ?40 to +85oc, v bat = 2.7 v to 5.5 v; typical values stated, where t a = 25oc and v bat = 3.6 v (unless otherwise noted). capacitance on serial interface pins scl and sda are 10 pf unless otherwise specified (1) . parameter test conditions min typ max unit t r scl/sda rise time 300 ns t f scl/sda fall time 300 ns t w(h) scl pulse width (high) 600 ns t w(l) scl pulse width (low) 1.3 s t su(sta) setup for repeated start 600 ns t d(sta) start to first falling edge of scl 600 ns t su(dat) data setup time 1 s t h(dat) data hold time 0 ns t su(stop) setup time for stop 600 ns bus free time between stop and t (buf) 1.3 s start f (scl) clock frequency 100 khz (1) parameters specified by worst-case test program execution in fast mode. figure 5. i 2 c serial communication timing i 2 c bus communication the 2-wire communication bus supports a slave-only device in a single- or multi-slave configuration with a single- or multi-master configuration. the device can be part of a shared bus by the unique setting of the 7-bit slave address. the 2-wire communication is bi-directional, consisting of a serial data line (sda) and serial clock line (scl). in receive mode, the sda terminal operates as an input; whereas, when the device is returning data to the master, the sda operates as an open drain output with an external resistive pull-up. the master device controls the initiation of the transaction on the bus line. data transfer : each data bit is transferred during an scl clock cycle (transition from low-to-high and then high- to-low). the data signal on the sda (logic level) must be stable during the high period of the scl clock pulse. a change in the sda logic when scl is high is interpreted as a start or stop control signal. if a transfer is interrupted by a stop condition, the partial byte transmission shall not be latched. only the prior messages transmitted and acknowledged are latched. data format : the data is an 8-bit format with the most significant bit (msb) first, and the least significant bit (lsb) followed by an acknowledge bit. if the slave cannot receive or transmit any byte of data until it services a priority interrupt, it can pull the scl line low to force the master device into wait state. the slave, once ready to resume data transfer, can release the scl line (get out of wait state). 10 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 scl sda t su (sta) t d (sta) t r t su ( da t) t h (dat) t w (h) t w ( l) t f t f t r t (buf) t su (stop) repeated st ar t stop start not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 bus idle : the bus is considered idle or busy when no master device has control of this device. the sda and scl lines are high when the bus is idle. the appropriate method to go into the stop condition is to ensure the bus returns to idle state. start (s) and stop (p) conditions : to initiate communications, the master device transitions the sda line from high-to-low when the scl is high. conversely, to stop the communication, the sda goes low-to-high when the scl is high. to continue communication without terminating one transaction and beginning another, a repeated start (sr) method can be used without a stop condition being initiated. these are the only conditions (start or stop) when sda transitions when scl is high. acknowledge bits : an acknowledge bit (a) is required after each data transfer byte to ensure correct communications. this occurs when the receiving device pulls the sda low before the rising edge of the acknowledge-related clock pulse (ninth pulse) and keeps it low until the scl returns low. there is also a no- acknowledge bit (n), which occurs when the receiver releases the sda line (high) before the rising edge of acknowledge-related clock pulse, and maintains the sda line high until scl returns low. the acknowledge bit indicates if a successful data transfer has occurred between the master and slave device. monitoring this bit also indicates an unsuccessful data transfer due to the receiving device being busy or as a system fault occurrence. communication format a start command immediately followed by a stop command is an illegal format. msb s slave address r/w a data a p s = start command r/w = read from slave device ("1") or write to slave device ("0") a = acknowledge bit p = stop command slave address = 7-bit address field for register address data = 8-bit data field copyright ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com general description the bq28z560-r1 accurately predicts the battery capacity and other operational characteristics of a single li-ion based rechargeable cell, while also providing a state-of-the-art protection function against short circuit, overcurrent, and overvoltage. the device can be integrated by a system processor to provide cell information, such as state-of-charge (soc), remaining capacity, and full charge capacity (fcc). note formatting conventions in this document: commands : italics with parentheses and no breaking spaces; for example, remainingcapacity() data flash : italics, bold, and breaking spaces; for example, design capacity register bits and flags : brackets only; for example, [tda] data flash bits : italics and bold; for example, [nr] modes and states : all capitals; for example, sealed mode data acquisition cell voltage the bq28z560-r1 samples the single cell voltage from the bat input terminal. the cell voltage is sampled and updated every 1 s in normal mode. to ensure accurate cell measurement, the vss ground connection of the bq28z560-r1 should be connected to the negative terminal of the single cell and not to the positive side of the sense resistor. charge measurement the device samples the charge into and out of the single cell using a low-value sense resistor. the resistor (typically 5 m ? to 20 m ? ) is connected between srp and srn to form a differential input to an integrating adc (coulomb counter). charge activity is detected when v sr = v srp ? v srn is positive and discharge activity is detected when v sr = v srp ? v srn is negative. this data is integrated over a period of time using an internal counter, and updates remainingcapacity with charge and discharge amounts every 1 s in normal mode. current measurement the device has a fifo buffer, which uses the last four coulomb counter readings to calculate the current. the current is updated every 1 s in normal mode. cell detection internal short detection the device can detect an internal battery short by setting the [se_isd] bit in pack configuration register b. the bq28z560-r1 compares the self-discharge current calculated based on stateofcharge() in relax mode and averagecurrent() measured in the system. the self-discharge is measured at 1-hour intervals. when the battery selfdischargecurrent() is less than a predefined isd current threshold, the isd flag bit is set high. tab disconnection detection the bq28z560-r1 detects tab disconnection by change in stateofhealth() . this feature is enabled by setting the [se_tdd] bit in pack configuration register b. the [tdd] bit is set in the flag register when the ratio of current stateofhealth() divided by the previous stateofhealth() reported is less than tdd soh percent. temperature measurement and the ts input the bq28z560-r1 measures external temperature via the ts pin in order to supply battery temperature status information to the gas gauging algorithm and charger-control sections of the gauge. alternatively, the gauge can also measure internal temperature via its on-chip temperature sensor. refer to the pack configuration[temps] control bit. 12 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 regardless of which sensor is used for measurement, a system processor can request the current battery temperature by calling the temperature() function. the temperature information is updated every 1 s in normal mode. the bq28z560-r1 external temperature sensing is optimized with the use of a high accuracy negative temperature coefficient (ntc) thermistor with r25 = 10 k ? 1% and b25/85 = 3435 k ? 1% (such as semitec 103at for measurement). reference schematic shows additional circuit information on connecting this thermistor to the bq28z560-r1. overtemperature indication overtemperature: charge if during charging temperature() reaches the threshold of ot chg for a period of ot chg time and averagecurrent() > chg current threshold , then based on system configuration the following occurs: ? if the gpio is set for cfet control, the gpio output will transition low and with the associated external circuitry the chg fet is turned off. when the temperature falls to ot chg recovery , the gpio will transition high again and allow the charge fet to turn on. ? if ot chg time = 0, the feature is completely disabled. ? if gpio is configured as alert output and if the otc_en bit in the alert configuration register is set to 1, the alert pin (pin 12) will transition low to signify a fault has occurred. the polarity of the alert output can be selected by setting the alrt_pol bit in the alert configuration register. the fault is cleared on read. overtemperature: discharge if during discharging temperature() reaches the threshold of ot dsg for a period of ot dsg time , and averagecurrent() ? dsg current threshold , then based on system configuration the following occurs: ? if the above condition is satisfied, then the dsg fet is turned off. when the temperature falls to ot dsg recovery , the dsg fet is turned on. ? if ot dsg time = 0, the feature is completely disabled. ? if gpio is configured as alert output and if the otd_en bit in the alert configuration register is set to 1, the alert pin (pin 12) will transition low to signify a fault has occurred. the polarity of the alert output can be selected by setting the alrt_pol bit in the alert configuration register. the fault is cleared on read. protection overcharge detector when charging a battery, if the v bat voltage becomes greater than the overcharge detection voltage (v det1 = 4.25 v typ) for a period up to the overcharge detection delay time (t det1 = 1.00 s typ), the bq28z560-r1 detects the overcharge state of the battery, and the cout pin transitions to a low level. this prohibits charging the battery by turning off the external charge control n-channel mosfet. in the overcharge state, if a charger is removed and a load is connected, the external charge control mosfet conducts the load current through its parasitic body diode. if the v bat voltage becomes lower than the overcharge release voltage (v rel1 = 4.07 v typ) for a period up to the overcharge release delay time (t rel1 = 8 ms typ), the cout pin transitions to a high level, enabling charge of the battery by turning on the external charge control n-channel mosfet. over-discharge detector when discharging a battery, if the v bat voltage becomes lower than the over-discharge detection voltage (v det2 = 2.3 v typ) for a period up to the over-discharge detection delay time (t det2 = 24 ms typ), the bq28z560- r1 detects the over-discharge state of the battery, and the dout pin transitions to a low level. this prohibits discharging the battery by turning off the external discharge control n-channel mosfet. copyright ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com in the over-discharge state, if a charger is connected, the external discharge control mosfet conducts the charge current through its parasitic body diode. if the v bat voltage becomes greater than the over-discharge detection voltage (v det2 = 2.3 v typ) for a period up to the overcharge release delay time (t rel2 = 4 ms typ), the dout pin transitions to a high-level enabling discharge of the battery by turning on the external discharge control n-channel mosfet. after detecting over-discharge, the device stops all operations and enters standby, which reduces the current consumed by the ic to its lowest mode (standby current). discharge overcurrent detector and short-circuit detector if the voltage across both protection mosfets (v m ? v ss ) becomes higher than the discharge overcurrent detection voltage (v det3 = 0.150 v typ) for a period of up to the discharge overcurrent detection delay time (t det3 = 12 ms typ), the bq28z560-r1 detects the discharge overcurrent state of the battery and the dout pin transitions to a low level. this prohibits discharging the battery by turning off the external discharge control n- channel mosfet. 14 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 bat dout cout vm v det1 v rel1 t v det2 bat v ss bat v ss pack C bat v ss pack C v det3 normal overcharge normal over-discharge normal t det2 t charger connected charger connected load connected shutdown t rel2 det1 rel1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 additionally, if the voltage across both protection mosfets (v m ? v ss ) becomes higher than the short-circuit voltage (v short = v bat ? 0.9 v typ) for a period up to the discharge short-circuit detection delay time (t short = 400 s typ), the bq28z560-r1 detects short-circuit of the battery and the dout pin transitions to a low level. this prohibits discharging the battery by turning off the external discharge control n-channel mosfet. in both the discharge overcurrent and short-circuit states, an internal discharge overcurrent release resistor (20 k typ) is turned on (switched in between vm and vss), allowing the vm pin to be pulled down to the vss potential if the load is released. if the v m ? v ss voltage becomes lower than the discharge overcurrent detection voltage (v det3 = 0.150 v typ) for a period up to the discharge overcurrent release delay time (t rel3 = 4 ms typ), the discharge overcurrent release resistor is turned off and the dout pin transitions to a high level, enabling discharge of the battery by turning on the external discharge control n-channel mosfet. copyright ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: bq28z560-r1 bat dout cout vm v det1 v rel1 t ocd v det2 bat v ss bat pack C bat v det3 normal discharge overcurrent normal normal t short t ocr t ocr load connected v short load short circuit load disconnected discharge overcurrent v ss v ss not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com charge overcurrent detector if the voltage across both protection mosfets (v m ? v ss ) becomes more negative than the charge overcurrent detection voltage (v det4 = ?0.112 v typ) for a period up to the charge overcurrent detection delay time (t det4 = 12 ms typ) due to an abnormal charging current or abnormal charging voltage, the bq28z560-r1 detects the overcurrent charge state of the battery and the cout pin transitions to a low level. this prohibits charging the battery by turning off the external charge control n-channel mosfet. the bq28z560-r1 releases from the charge overcurrent detection state on by detecting the connection of a load for a period up to the overcharge release delay time (t rel4 = 4 ms typ). table 2. hardware control due to fault detection delay fault condition dout cout comment (typ) once bathi occurs for longer than the specified duration (1 s typ), the chg fet is turned off, and bus communication is not valid, the system will support power to the overcharge voltage on off 1 s load with current flow through the chg fet parasitic diode. this can cause the cell to protection discharge. once the cell voltage reaches the overcharge release voltage for the specified duration (8 ms typ) the chg fet is turned on and bus communication is valid. if the cell is being charged with excessive current, the threshold will be based on a hardware limit measurement of ?112 mv typ across the chg + dsg fet (vm ? vss) for a duration longer than 12 ms (typ), the chg fet is turned off and bus communication is not valid. this will prevent further charging of the cell. the setting of the chg bit in the overcurrent control status register is dependent on the oc bit setting in the flags bit definition protection during on off 12 ms register selection. charging the fet bit in the control between the charger is removed and cell voltage falls below the threshold for greater than 8 ms (typ). cout is turned back on. once the host mcu takes corrective action or if the battery charger is removed and there is a load detected for a period of 4 ms (typ), the chg fet is turned on bus communication is valid. if the cell voltage falls to lower than 2.3 v for a duration of 24 ms (typ), the dsg fet is over discharging turned off, and bus communication is not valid. the system requires if the charger is off on 24 ms voltage protection connected and cell voltage rises above threshold for greater than 4 ms (typ). dout is turned back on and bus communication is valid. if the cell is being discharged with excessive current, the threshold will be based on a hardware limit measurement of 150 mv typ across the dsg + chg fet ( vm ? vss) for overcurrent a duration longer than 12 ms (typ), the dsg fet is turned off, and bus communication protection during off on 12 ms is not valid. this prevents further discharging of the cell, and the dsg bit in the control discharging status register will be set. if the drop across the dsg + chg fet is less than the threshold or there is no load detected for a duration of 4 ms (typ), the dsg fet is turned on and bus communication is valid. detection of cell short circuit is measured at vm input. shorted cell detection is v bat ? 0.9 v for greater than 400 s at vm terminal, and the dsg fet is turned off, and bus short-circuit off on 400 s communication is not valid. the dsg bit in the control status register will be set. the protection system will turn the dsg fet on if the voltage at vm is below 150 mv or no load is detected. gas gauge control of discharge dout pin firmware control of dout for protection the gas gauge firmware can override the hardware-based protection by forcing dout low to turn off the discharge fet. however, the firmware cannot override the hardware protection to force discharge. the following conditions can enable firmware to force dout low: 1. batlow?undervoltage protection using cuv settings. if the cell voltage drops below the firmware setting the dout pin transitions to a low to turn off the discharge fet. the discharge fet is turned back on once the cell voltage rises above the set hysteresis. 2. ocd condition?if the average discharge current is greater than the set ocd current, the dout pin transitions low to turn of the discharge fet. the discharge fet is turned back on once the average current decreases below the set level. 3. otd condition?the dout will transition low if the discharge current is flowing and the temperature is above th set otd threshold. 16 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 4. the host_disconnect (dsg fet off) subcommand?this feature is useful for the system to disable the discharge fet from the battery pack if it fails to authenticate. the conditions stated above are ignored if there is charge current flow (body diode protection). gas gauge control of charge fet firmware control of charge fet for protection the gas gauge firmware control of the charge fet is achieved by using the gpio with external circuitry. typically the cout pin is high and so to override this, the gpio pin transitions low and the chg fet gate drive is pulled low to turn off the charge fet. the output of the gpio pin will be released once the fault condition is removed. the following parameters can be controlled through firmware (gpio pin) providing the set thresholds are within the range of the hardware limits set by the protector. 1. bathi?overvoltage protection using cov settings. if the cell voltage exceeds the firmware setting the gpio output transitions low to turn off the charge fet. the charge fet is turned back on once the cell voltage decays below the set hysteresis (gpio output transitions high). 2. occ condition?if the average current is greater than the set occ current, the gpio output transitions low to turn of the charge fet. the charge fet is turned back on once the average current decreases to the set level. 3. otc condition?the cfet output will transition low if the charge current is flowing and the temperature is above the set otc threshold or charge inhibit temperature hi. alternatively, the cfet will not be allowed to turn on if the temperature is above the set otc or charge inhibit temperature hi thresholds and charge inhibit flag is set. the conditions stated above are ignored if there is discharge current flow (body diode protection). 4. taper current (tc) condition?this condition can also be used to turn off the charge fet when the [chgfetterm]bit (bit 2/0x04) in operation configuration c is set and the gauge detects primary charge termination. the chg fet would turn on once rsoc < tca clear%. zero voltage charging when the cell voltage is 0 v and if the charger voltage is above the minimum operating voltage for 0 v charging (1.2 v max), the cout output transitions to a high level and charge current can flow. fet control protection figure 6 shows an overview of the fet control protection operation. copyright ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com figure 6. fet control protection note when the chg fet or dsg fet is turned off due to fault conditions, bus communication is not valid. the bus communication will only be activated by removal of the fault condition (see table 2 ). 18 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 no charger attach a charge normal overcharge voltage protection overcurrent protection during charging shutdown short - circuit protection over -discharge protection chg: on dsg: off vreg: on chg: on dsg: off vreg: on chg: off dsg: on vreg: on chg: off dsg: on vreg: on chg: on dsg: on vreg: on chg: off dsg: off vreg: off chg: on dsg: off vreg: off for a period of t > 4.0 ms vm > C 0.9 v for a period of t > 400 s vm < 0.15 v or no load detected vm > 0.15 v for a period of 12 ms vm < 0.15 v or no load detected for a period of 4.0 ms vm < C 0.112 v for a period of 12 ms charger removed and load detected for a period of 4.0 ms > 4.25 v for a period of 1.0 s < 2.3 v for a period of t > 24 ms during discharging overcurrent protection > 2.3 v bat v bat v bat v < 4.07 v for a period of 8.0 ms bat v bat v not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 regulator regulator out voltage is fixed at typically 2.5 v with a minimum output capacitance of 0.1 f (0.47 f typ). there is an internal current limit designed for 60 ma (typ) when output is shorted to gnd. when v bat is over 8.0 v (typ), the regulator is turned off for the safety of the package dissipation. copyright ? 2013, texas instruments incorporated submit documentation feedback 19 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com data commands standard data commands the bq28z560-r1 uses a series of 2-byte standard commands to enable system reading and writing of battery information. each standard command has an associated command-code pair, as indicated in table 3 . each protocol has specific means to access the data at each command code. dataram is updated and read by the gauge only once per second. standard commands are accessible in normal operation mode. table 3. standard commands sealed name command code units access control() cntl 0x00 / 0x01 n/a r/w atrate() ar 0x02 / 0x03 ma r/w atratetimetoempty() artte 0x04 / 0x05 minutes r temperature() temp 0x06 / 0x07 0.1k r voltage() volt 0x08 / 0x09 mv r flags() flags 0x0a / 0x0b n/a r nominalavailablecapacity() nac 0x0c / 0x0d mah r fullavailablecapacity() fac 0x0e / 0x0f mah r remainingcapacity() rm 0x10 / 0x11 mah r fullchargecapacity() fcc 0x12 / 0x13 mah r averagecurrent() ai 0x14 / 0x15 ma r timetoempty() tte 0x16 / 0x17 minutes r timetofull() ttf 0x18 / 0x19 minutes r standbycurrent() si 0x1a / 0x1b ma r standbytimetoempty() stte 0x1c / 0x1d minutes r maxloadcurrent() mli 0x1e / 0x1f ma r maxloadtimetoempty() mltte 0x20 / 0x21 minutes r mwhr / availableenergy() ae 0x22 / 0x23 r cwhr averagepower() ap 0x24 / 0x25 mw / cw r tteatconstantpower() ttecp 0x26 / 0x27 minutes r internal_temp() inttemp 0x28 / 0x29 0.1k r cyclecount() cc 0x2a / 0x2b counts r stateofcharge() soc 0x2c / 0x2d % r stateofhealth() soh 0x2e / 0x2f % / num r passedcharge() pchg 0x34 / 0x35 mah r dod0() dod0 0x36 / 0x37 hex# r selfdischargecurrent() sdsg 0x38 / 0x39 ma r control(): 0x00/0x01 issuing a control() command requires a subsequent 2-byte subcommand. these additional bytes specify the particular control function desired. the control() command allows the system to control specific features of the bq28z560-r1 during normal operation and additional features when the bq28z560-r1 is in different access modes, as described in table 4 . table 4. control() subcommands sealed cntl function cntl data description access control_status 0x0000 yes reports the status of df checksum, hibernate, it, etc. device_type 0x0001 yes reports the device type of 0x0541 (indicating bq28z560-r1) 20 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 table 4. control() subcommands (continued) sealed cntl function cntl data description access fw_version 0x0002 yes reports the firmware version on the device type hw_version 0x0003 yes reports the hardware version of the device type reserved 0x0004 no not to be used reset_data 0x0005 no returns reset data reserved 0x0006 no not to be used prev_macwrite 0x0007 no returns previous mac command code chem_id 0x0008 yes reports the chemical identifier of the impedance track configuration board_offset 0x0009 no forces the device to measure and store the board offset cc_offset 0x000a no forces the device to measure and internal cc offset cc_offset_save 0x000b no forces the device to store the internal cc offset df_version 0x000c yes reports the data flash version on the device set_fullsleep 0x0010 no set the [fullsleep] bit in control status register to 1 set_hibernate 0x0011 yes forces control_status [hibernate] to 1 clear_hibernate 0x0012 yes forces control_status [hibernate] to 0 forces control_status [shutdown] to 1. set_shutdown set_shutdown 0x0013 yes enables the system to enter into shutdown mode. clear_shutdown 0x0014 yes forces control_status [shutdown] to 0 set_hdqinten 0x0015 yes forces control_status [hdqinten] to 1 clear_hdqinten 0x0016 yes forces control_status [hdqinten] to 0 static_chem_chksum 0x0017 yes calculates chemistry checksum host_disconnect 0x0018 yes forces the dout pin low to disable discharge clears dsgfetoff, allowing dout to go high if no other conditions force host_connect 0x0019 yes it low sealed 0x0020 no places the bq28z560-r1 in sealed access mode it_enable 0x0021 no enables the impedance track algorithm cal_enable 0x002d no toggle bq28z560-r1 calibration mode reset 0x0041 no forces a full reset of the bq28z560-r1 exit_cal 0x0080 no exit bq28z560-r1 calibration mode enter_cal 0x0081 no enter bq28z560-r1 calibration mode offset_cal 0x0082 no reports internal cc offset in calibration mode control_status: 0x0000 instructs the gas gauge to return status information to control addresses 0x00/0x01. the status word includes the following information. table 5. control_status flags bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 high byte dsgfetoff fas ss calmode cca bca csv hdqinten low byte shutdown hibernate fullsleep sleep ldmd rup_dis vok qen dsgfetoff = state bit indicating the discharge fet has been disabled by host (host disconnect). fas = status bit indicating the bq28z560-r1 is in full access sealed state. active when set. ss = status bit indicating the bq28z560-r1 is in the sealed state. active when set. calmode = status bit indicating the calibration function is active. true when set. default is 0. status bit indicating the bq28z560-r1 coulomb counter calibration routine is active. the cca routine takes place cca = approximately 1 minute after the initialization and periodically as gauging conditions change. active when set. bca = status bit indicating the bq28z560-r1 board calibration routine is active. active when set. csv = status bit indicating a valid data flash checksum has been generated. active when set. copyright ? 2013, texas instruments incorporated submit documentation feedback 21 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com hdqinten = status bit indicating the hdq interrupt function is active. true when set. default is 0. shutdown = status bit indicating the bq28z560-r1 is in shutdown mode. true when set. default is 0. hibernate = status bit indicating a request for entry into hibernate from sleep mode has been issued. true when set. default is 0. control bit when set will put the bq28z560-r1 into the lower power state of sleep mode. it is not possible to monitor this bit. status bit indicating the bq28z560-r1 is in fullsleep mode. true when set. the state can be detected by monitoring fullsleep = the power used by the bq28z560-r1 because any communication will automatically clear it. sleep = status bit indicating the bq28z560-r1 is in sleep mode. true when set. ldmd = status bit indicating the bq28z560-r1 impedance track algorithm using constant power mode. true when set. default is 0 (constant current mode). rup_dis = status bit indicating the bq28z560-r1 ra table updates are disabled. true when set. vok = status bit indicating cell voltages are ok for qmax updates. true when set. qen = status bit indicating the bq28z560-r1 qmax updates are enabled. true when set. control(): 0x00/0x01 issuing a control() command requires a subsequent 2-byte subcommand. these additional bytes specify the particular control function desired. the control() command allows the system to control specific features of the bq28z560-r1 during normal operation and additional features when the device is in access modes, as described in table 6 . table 6. control() subcommands cntl function cntl data sealed access description set_fullsleep 0x0010 yes sets the [fullsleep] bit in control status register to 1 set_hibernate 0x0011 yes forces control_status [hibernate] to 1 clear_hibernate 0x0012 yes forces control_status [hibernate] to 0 set_shutdown 0x0013 yes forces control_status [shutdown] to 1 clear_shutdown 0x0014 yes forces control_status [shutdown] to 0 host_disconnect 0x0018 yes forces the dout pin low to disable discharge. host_connect 0x0019 yes clears dsgfetoff allowing dout to go high if no other conditions force it low device_type: 0x0001 instructs the gas gauge to return the device type to addresses 0x00/0x01. fw_version: 0x0002 instructs the gas gauge to return the firmware version to addresses 0x00/0x01. the bq28z560-r1 firmware version return is 0x0214. hw_version: 0x0003 instructs the gas gauge to return the hardware version to addresses 0x00/0x01. for bq28z560-r1, 0x0060 is returned. for a firmware upgrade from bq28z560-r1, 0x0000 or 0x0060 is returned. reset_data: 0x0005 instructs the gas gauge to return the number of resets performed to addresses 0x00/0x01. prev_macwrite: 0x0007 instructs the gas gauge to return the previous command written to addresses 0x00/0x01. the value returned is limited to less than 0x0020. chem_id: 0x0008 instructs the gas gauge to return the chemical identifier for the impedance track configuration to addresses 0x00/0x01. 22 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 board_offset: 0x0009 instructs the gas gauge to calibrate board offset. during board offset calibration the [bca] bit is set. cc_offset: 0x000a instructs the gas gauge to calibrate coulomb counter offset. during calibration the [cca] bit is set. cc_offset_save: 0x000b instructs the gas gauge to save the calibration coulomb counter offset after calibration. df_version: 0x000c instructs the gas gauge to return the data flash version to addresses 0x00/0x01. set_fullsleep: 0x0010 instructs the gas gauge to set the fullsleep bit in the control status register to 1. this allows the gauge to enter the fullsleep power mode after the transition to sleep power state is detected. in fullsleep mode, less power is consumed by disabling an oscillator circuit used by the communication engines. for hdq communication, one host message will be dropped. for i 2 c communications, the first i 2 c message will incur a 6?8 ms clock stretch while the oscillator is started and stabilized. a communication to the device in fullsleep forces the device back to sleep mode. set_hibernate: 0x0011 instructs the gas gauge to force the control_status [hibernate] bit to 1. this enables the gauge to enter the hibernate power mode after the transition to sleep power state is detected and the required conditions are met. the [hibernate] bit is automatically cleared upon exiting from hibernate mode. caution do not use the control() subcommand set_hibernate to disable hibernate mode. to disable hibernate mode, hibernate voltage and current must be set to 0 in the data flash. if hibernate mode is initiated, always ensure that the bus line is pulled high by an external resistor. it is important to prevent the bus line from being pulled low by an external signal on the line when in hibernate mode; otherwise, the device may latch and a cold power cycle is required. clear_hibernate: 0x0012 instructs the gas gauge to force the control_status [hibernate] bit to 0. this prevents the gauge from entering the hibernate power mode after the transition to sleep power state is detected. it can also be used to force the gauge out of hibernate mode. set_shutdown: 0x0013 sets the control_status [shutdown] bit to 1, thereby enabling the gas gauge to enter shutdown mode, depending on whether the conditions are met for gas gauge shutdown or not. the delay for shutdown is 1 s, providing there is no charging current detected. clear_shutdown: 0x0014 disables the shutdown by setting this bit to 1, thereby forcing control_status [shutdown] to 0. set_hdqinten: 0x0015 instructs the gas gauge to set the control_status [hdqinten] bit to 1. this enables the hdq interrupt function. when this subcommand is received, the device will detect any of the interrupt conditions and assert the interrupt at 1-s intervals until the clear_hdqinten command is received or the count of hdqhostintrtries has lapsed (default 3). copyright ? 2013, texas instruments incorporated submit documentation feedback 23 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com clear_hdqinten: 0x0016 instructs the gas gauge to set the control_status [hdqinten] bit to 0. this disables the hdq interrupt function. static_chem_df_chksum: 0x0017 instructs the gas gauge to calculate chemistry checksum as a 16-bit unsigned integer sum of all static chemistry data. the most significant bit (msb) of the checksum is masked yielding a 15-bit checksum. this checksum is compared with the value stored in the data flash static chem df checksum . if the value matches, the msb will be cleared to indicate a pass. if it does not match, the msb will be set to indicate failure. dsg fet off (host_disconnect): 0x0018 instructs the gas gauge to force the protection dout pin to a low level. this prohibits discharging the battery by turning off the external discharge control n-channel mosfet. dsg fet on (host_connect): 0x0019 instructs the gas gauge to release the dout high if no other conditions exist to force the pin low. this allows discharging the battery by turning on the external discharge control n-channel mosfet. sealed: 0x0020 instructs the gas gauge to transition from unsealed state to sealed state. the gas gauge should always be set to sealed state for use in customers' end equipment. it enable: 0x0021 this command forces the gas gauge to begin the impedance track algorithm, sets bit 2 of updatestatus , and causes the [vok] and [qen] flags to be set in the control_status register. [vok] is cleared if the voltages are not suitable for a qmax update. once set, [qen] cannot be cleared. this command is only available when the gas gauge is unsealed and is typically enabled at the last step of production after a system test is completed. the cfet and dfet are not automatically enabled until the it enable bit is sent. prior to this, to control these fets, a command must be sent to set the chgfet and dsgfet bits in the flags bit definitions register to enable the cout and dout, respectively. cal_enable: 0x002d this command toggles the calen bit in the pack configuration register. reset: 0x0041 this command instructs the gas gauge to perform a full reset. this command is only available when the gas gauge is unsealed. exit_cal: 0x0080 this command instructs the gas gauge to exit calibration mode. enter_cal: 0x0081 this command instructs the gas gauge to enter calibration mode. offset_cal: 0x0082 this command instructs the gas gauge to perform offset calibration. atrate(): 0x02/0x03 the atrate() read-/write-word function is the first half of a two-function command call-set used to set the atrate value in calculations made by the atratetimetoempty() function. the atrate() units are in ma. 24 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 the atrate() value is a signed integer with negative values interpreted as a discharge current value. the atratetimetoempty() function returns the predicted operating time at the atrate value of discharge. the default value for atrate() is zero and will force atratetimetoempty() to return 65,535. both the atrate() and atratetimetoempty() commands should only be used in normal mode. atratetimetoempty(): 0x04/0x05 this read-only function returns an unsigned integer value of the predicted remaining operating time if the battery is discharged at the atrate() value in minutes with a range of 0 to 65,534. a value of 65,535 indicates atrate() = 0. the gas gauge updates atratetimetoempty() within 1 s after the system sets the atrate() value. the gas gauge automatically updates atratetimetoempty() based on the atrate() value every 1 s. the atrate() and atratetimetoempty() commands should only be used in normal mode. temperature(): 0x06/0x07 this read-only function returns an unsigned integer value of the battery temperature in units of 0.1k measured by the gas gauge. voltage(): 0x08/0x09 this read-only function returns an unsigned integer value of the measured cell-pack voltage in mv with a range of 0 to 6000 mv. flags(): 0x0a/0x0b this read-only function returns the contents of the gas-gauge status register, depicting the current operating status. table 7. flags bit definitions bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 high byte ot oc bathi batlo chg_inh alrt fc chg low byte ocvtaken isd tdd chgfet dsgfet soc1 socf dsg these fault flags will only clear if the fault condition is removed: ot = overtemperature in a charge or discharge condition is detected. true when set. oc = overcurrent in a charge or discharge condition is detected. true when set. battery high bit indicating a high battery voltage condition. refer to the data flash battery high parameters for bathi = threshold settings. battery low bit indicating a low battery voltage condition. refer to the data flash battery low parameters for batlo = threshold settings. chg_inh = charge inhibit indicates the temperature is outside the range [charge inhibit temp low, charge inhibit temp high] . true when set. alrt = indicates there is an alert in the system. true when set. full-charged is detected. fc is set when charge termination is reached and fc set% = ?1 (see charging and fc = charge termination indication for details) or state of charge is larger than fc set% and fc set% is not ?1. true when set. chg = (fast) charging allowed. true when set. ocvtaken = cleared on entry to relax mode and set to 1 when ocv measurement is performed in relax. isd = internal short is detected. true when set. tdd = tab disconnect is detected. true when set. chgfet= indicates the state of the firmware cfet control. true when set to 1. dsgfet= indicates the state of the firmware dfet control. true when set to 1. soc1 = state-of-charge-threshold 1 (soc1 set) reached. true when set. socf = state-of-charge-threshold final (socf set %) reached. true when set. dsg = discharging detected. true when set. copyright ? 2013, texas instruments incorporated submit documentation feedback 25 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com nominalavailablecapacity(): 0x0c/0x0d this read-only command pair returns the uncompensated (less than c/20 load) battery capacity remaining. units are mah. fullavailablecapacity(): 0x0e/0x0f this read-only command pair returns the uncompensated (less than c/20 load) capacity of the battery when fully charged. units are mah. fullavailablecapacity() is updated at regular intervals, as specified by the impedance track algorithm. remainingcapacity(): 0x10/0x11 this read-only command pair returns the compensated battery capacity remaining. units are mah. fullchargecapacity(): 0x12/13 this read-only command pair returns the compensated capacity of the battery when fully charged. units are mah. fullchargecapacity() is updated at regular intervals, as specified by the impedance track algorithm. averagecurrent(): 0x14/0x15 this read-only command pair returns a signed integer value that is the average current flow through the sense resistor. it is updated every 1 s. units are ma. timetoempty(): 0x16/0x17 this read-only function returns an unsigned integer value of the predicted remaining battery life at the present rate of discharge, in minutes. a value of 65,535 indicates battery is not being discharged. timetofull(): 0x18/0x19 this read-only function returns an unsigned integer value of predicted remaining time until the battery reaches full charge, in minutes, based upon averagecurrent() . the computation accounts for the taper current time extension from the linear ttf computation based on a fixed averagecurrent() rate of charge accumulation. a value of 65,535 indicates the battery is not being charged. standbycurrent(): 0x1a/0x1b this read-only function returns a signed integer value of the measured standby current through the sense resistor. the standbycurrent() is an adaptive measurement. initially it reports the standby current programmed in initial standby , and after spending some time in standby, reports the measured standby current. the register value is updated every 1 s when the measured current is above the deadband and is less than or equal to 2 x initial standby . the first and last values that meet this criteria are not averaged in, since they may not be stable values. to approximate a 1-minute time constant, each new standbycurrent() value is computed by taking the approximate 93% weight of the last standby current and the approximate 7% of the current measured average current. standbytimetoempty(): 0x1c/0x1d this read-only function returns an unsigned integer value of the predicted remaining battery life at the standby rate of discharge, in minutes. the computation uses nominal available capacity (nac), the uncompensated remaining capacity, for this computation. a value of 65,535 indicates the battery is not being discharged. maxloadcurrent(): 0x1e/0x1f this read-only function returns a signed integer value, in units of ma, of the maximum load conditions. the maxloadcurrent() is an adaptive measurement, which is initially reported as the maximum load current programmed in initial max load current . if the measured current is ever greater than initial max load current , then maxloadcurrent() updates to the new current. maxloadcurrent() is reduced to the average of the previous value and initial max load current whenever the battery is charged to full after a previous discharge to an soc less than 50%. this prevents the reported value from maintaining an unusually high value. 26 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 maxloadtimetoempty(): 0x20/0x21 this read-only function returns an unsigned integer value of the predicted remaining battery life at the maximum load current discharge rate, in minutes. a value of 65,535 indicates that the battery is not being discharged. availableenergy(): 0x22/0x23 this read-only function returns an unsigned integer value of the predicted charge or energy remaining in the battery. the value is reported in units of mw ( design energy scale = 1) or cw ( design energy scale = 10). averagepower(): 0x24/0x25 this read-word function returns an unsigned integer value of the average power of the current discharge. it is negative during discharge and positive during charge. a value of 0 indicates that the battery is not being discharged. the value is reported in units of mw ( design energy scale = 1) or cw ( design energy scale = 10). timetoemptyatconstantpower(): 0x26/0x27 this read-only function returns an unsigned integer value of the predicted remaining operating time if the battery is discharged at the averagepower() value in minutes. a value of 65,535 indicates averagepower() = 0. the gas gauge automatically updates timetoemptyatconstantpower() based on the averagepower() value every 1 s. internal_temp(): 0x28/0x29 this read-only function returns an unsigned integer value of the measured internal temperature of the device in units of 0.1k measured by the gas gauge. cyclecount(): 0x2a/0x2b this read-only function returns an unsigned integer value of the number of cycles the battery has experienced with a range of 0 to 65,535. one cycle occurs when accumulated discharge cc threshold . stateofcharge(): 0x2c/0x2d this read-only function returns an unsigned integer value of the predicted remaining battery capacity expressed as a percentage of fullchargecapacity() , with a range of 0 to 100%. stateofhealth(): 0x2e/0x2f 0x2e soh percentage: this read-only function returns an unsigned integer value, expressed as a percentage of the ratio of predicted fcc(25c, soh current rate) over the designcapacity() . the fcc(25c, soh current rate) is the calculated full charge capacity at 25c and the soh current rate, which is specified in the data flash (state of health load). the range of the returned soh percentage is 0x00 to 0x64, indicating 0 to 100%, correspondingly. passedcharge(): 0x34/0x35 this signed integer indicates the amount of charge passed through the sense resistor since the last impedance track simulation in mah. dod0(): 0x36/0x37 this unsigned integer indicates the depth of discharge during the most recent ocv reading. selfdischargecurrent(): 0x38/0x39 this read-only command pair returns the signed integer value that estimates the battery self discharge current. copyright ? 2013, texas instruments incorporated submit documentation feedback 27 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com extended data commands extended commands offer additional functionality beyond the standard set of commands. they are used in the same manner; however, unlike standard commands, extended commands are not limited to 2-byte words. the number of command bytes for a given extended command ranges in size from single to multiple bytes, as specified in table 8 . for details on the sealed and unsealed states, see access modes . table 8. extended commands sealed unsealed name command code units access (1) (2) access (1) (2) reserved rsvd 0x38?0x39 n/a r r packconfig() pcr 0x3a / 0x3b hex# r r designcapacity() dcap 0x3c / 0x3d mah r r dataflashclass() (2) dfcls 0x3e n/a n/a r/w dataflashblock() (2) dfblk 0x3f n/a r/w r/w blockdata() / authenticate() (3) a/df 0x40?0x53 n/a r/w r/w blockdata() / authenticatechecksum() (3) acks/dfd 0x54 n/a r/w r/w blockdata() dfd 0x55?0x5f n/a r r/w blockdatachecksum() dfdcks 0x60 n/a r/w r/w blockdatacontrol() dfdcntl 0x61 n/a n/a r/w reserved rsvd 0x62...0x69 n/a r r batalertconfig() bac 0x6a/0x6b n/a r/w r/w batalertstatus() bas 0x6c/0x6d n/a r/w r/w reserved rsvd 0x6e...0x7f n/a r r (1) sealed and unsealed states are entered via commands to control() 0x00/0x01. (2) in sealed mode, data flash cannot be accessed through commands 0x3e and 0x3f. (3) the blockdata() command area shares functionality for accessing general data flash and for using authentication. see authentication for details. packconfig(): 0x3a/0x3b sealed and unsealed access: this command returns the value stored in pack configuration , which is expressed in hex value. designcapacity(): 0x3c/0x3d sealed and unsealed access: this command returns the value stored in design capacity , which is expressed in mah. this is intended to be the theoretical or nominal capacity of a new pack, but has no bearing on the operation of the gas gauge functionality. dataflashclass(): 0x3e this command sets the data flash class to be accessed. the class to be accessed should be entered in hexadecimal. sealed access: this command is not available in sealed mode. dataflashblock(): 0x3f unsealed access: this command sets the data flash block to be accessed. when 0x00 is written to blockdatacontrol(), dataflashblock() holds the block number of the data flash to be read or written. example: writing a 0x00 to dataflashblock() specifies access to the first 32-byte block, and a 0x01 specifies access to the second 32-byte block, and so on. reading device name in unsealed mode to read the devicename in unsealed mode, set the blockdatacontrol() (command 0x61) to a 1. this is similar to how the manufacturer information block works. since the device name is 20 bytes, the device name will be followed by null bytes. 28 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 sealed access: this command directs which data flash block will be accessed by the blockdata() command. writing a 0x00 to dataflashblock() specifies the blockdata() command will transfer authentication data. issuing a 0x01, 0x02, or 0x03 instructs the blockdata() command to transfer manufacturer info block a or b , respectively. reading device name in sealed mode to read the devicename when in sealed mode, set the dataflashblock() (command 0x3f) to 0x05, and read the device name from the blockdata() commands. in general, there will be at least 12 null characters because the data flash field is limited to 20 bytes and the sealed mode block has 32 bytes of space. blockdata(): 0x40?0x5f this command range is used to transfer data for data flash class access. this command range is the 32-byte data block used to access manufacturer info block a or b . manufacturer info block a is read-only for the sealed access. unsealed access is read/write. blockdatachecksum(): 0x60 the host system should write this value to inform the device that new data is ready for programming into the specified data flash class and block. unsealed access: this byte contains the checksum on the 32 bytes of block data read or written to data flash. the least-significant byte of the sum of the data bytes written must be complemented ([255 ? x] for x the 8-bit summation of the blockdata() (0x40 to 0x5f) on a byte-by-byte basis) before being written to 0x60. sealed access: this byte contains the checksum for the 32 bytes of block data written to manufacturer info block a or b . the least-significant byte of the sum of the data bytes written must be complemented ([255 ? x] for x the 8-bit summation of the blockdata() (0x40 to 0x5f) on a byte-by-byte basis) before being written to 0x60. blockdatacontrol(): 0x61 unsealed access: this command is used to control data flash access mode. the value determines the data flash to be accessed. writing 0x00 to this command enables blockdata() to access general data flash. sealed access: this command is not available in sealed mode. reserved(): 0x62...0x69 reserved. batalertconfig(): 0x6a/0x6b the batalertconfig() register can be written to set which faults, once detected, will trigger an alert. the data flash value for batalertconfig() is used to initialize this value. table 9. batalertconfig() definitions high byte bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 batalertconfig() utc_en utd_en rsvd rsvd rsvd rsvd rsvd rsvd low byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 batalertconfig() otc_en otd_en bathi_en batlo_en rsvd soc1_en occ_en ocd_en utc_en = enables alert for over temperature charge current when set to 1. default is 1. utd_en = enables alert for over temperature discharge current when set to 1. default is 1. rsvd = reserved. default = 0. otc_en = enables alert for over temperature charge current when set to 1. default is 1. otd_en = enables alert for over temperature discharge current when set to 1. default is 1. bathi_en= enables alert for battery high condition when set to 1. default is 0. batlo_en = enables alert for battery low condition when set to 1. default is 0. copyright ? 2013, texas instruments incorporated submit documentation feedback 29 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com rsvd = reserved. default = 0. soc1_en = enables alert for state-of-charge-threshold 1 (soc1 set) reached. true when set. default is 1. occ_en = enables alert for over current charge condition when set to 1. default is 0. ocd_en= enables alert for over current discharge condition when set to 1. default is 0. batalertstatus(): 0x6c/0x6d the batalertstatus() register allows reading the safety conditions that triggered the alert. if the pack configuration [clr_read] is set to 1, batalertstatus() will be reset, and the alert assertion removed immediately. otherwise, the batalertstatus() flags will clear only after the safety flag has reset, and the alert assertion clears once all flags in batalertstatus() have cleared. table 10. batalertstatus() definitions high byte bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 batalertstatus() utc utd rsvd rsvd rsvd rsvd rsvd rsvd low byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 batalertstatus() otc otd bathi batlo rsvd soc1 occ ocd the following functions can be detected for fault conditions when set in the batalert configuration register. the fault can be indicated on alert pin (if configured) but not differentiated because of the or logic. utc = detected under temperature charge current when set to 1. utd = detected under temperature discharge current when set to 1. rsvd = reserved. default = 0. otc = detected over temperature charge current when set to 1. otd = detected over temperature discharge current when set to 1. bathi= detected battery high condition when set to 1. batlo = detected battery low condition when set to 1. rsvd = reserved. default = 0. soc1 = detected state-of-charge-threshold 1 (soc1 set) reached. occ = detected over current charge condition when set to 1. ocd= detected over current discharge condition when set to 1. reserved ? 0x6e?0x7f 30 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 data flash interface accessing the data flash the bq28z560-r1 data flash is a non-volatile memory that contains initialization, default, cell status, calibration, configuration, and user information. the data flash can be accessed in several different ways, depending on in which mode the bq28z560-r1 is operating and what data is being accessed. commonly accessed data flash memory locations frequently read by a system are conveniently accessed through specific instructions, as described in data commands . these commands are available when the bq28z560-r1 is either in unsealed or sealed mode. most data flash locations, however, are only accessible in unsealed mode by use of the bq28z560-r1 evaluation software or by data flash block transfers. these locations should be optimized and/or fixed during the development and manufacture processes. they become part of a golden image file and can then be written to multiple battery packs. once established, the values generally remain unchanged during end-equipment operation. to access data flash locations individually, the block containing the desired data flash location(s) must be transferred to the command register locations where they can be read to the system or changed directly. this is accomplished by sending the set-up command blockdatacontrol() (0x61) with data 0x00. up to 32 bytes of data can be read directly from the blockdata() (0x40?0x5f), externally altered, then rewritten to the blockdata() command space. alternatively, specific locations can be read, altered, and rewritten if their corresponding offsets are used to index into the blockdata() command space. finally, the data residing in the command space is transferred to data flash once the correct checksum for the whole block is written to blockdatachecksum() (0x60). occasionally, a data flash class will be larger than the 32-byte block size. in this case, the dataflashblock() command is used to designate which 32-byte block the desired locations reside. the correct command address is then given by 0x40 + offset modulo 32. for example, to access terminate voltage in the gas gauging class, dataflashclass() is issued 80 (0x50) to set the class. because the offset is 67, it must reside in the third 32-byte block. hence, dataflashblock() is issued 0x02 to set the block offset, and the offset used to index into the blockdata() memory area is 0x40 + 67 modulo 32 = 0x40 + 16 = 0x40 + 0x03 = 0x43. reading and writing subclass data are block operations up to 32 bytes in length. if the data length exceeds the maximum block size during a write, then the data is ignored. note none of the data written to memory is bounded by the bq28z560-r1: the values are not rejected by the gas gauge. writing an incorrect value may result in hardware failure due to firmware program interpretation of the invalid data. the written data is persistent, so a power-on reset does not resolve the fault. copyright ? 2013, texas instruments incorporated submit documentation feedback 31 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com functional description fuel gauging the bq28z560-r1 measures the cell voltage, temperature, and current to determine the battery soc based on the impedance track algorithm (refer to the theory and implementation of impedance track battery fuel- gauging algorithm application report [ slua450 ] for more information). the bq28z560-r1 monitors charge and discharge activity by sensing the voltage across a small-value resistor (5 m to 20 m typ.) between the srp and srn pins and in series with the cell. by integrating charge passing through the battery, the battery?s soc is adjusted during battery charge or discharge. the total battery capacity is found by comparing states of charge before and after applying the load with the amount of charge passed. when an application load is applied, the impedance of the cell is measured by comparing the ocv obtained from a predefined function for present soc with the measured voltage under load. measurements of ocv and charge integration determine chemical state of charge and chemical capacity (qmax). the initial qmax values are taken from a cell manufacturers' data sheet multiplied by the number of parallel cells. it is also used for the value in design capacity . the bq28z560-r1 acquires and updates the battery-impedance profile during normal battery usage. it uses this profile, along with soc and the qmax value, to determine fullchargecapacity() and stateofcharge() , specifically for the present load and temperature. fullchargecapacity() is reported as capacity available from a fully charged battery under the present load and temperature until voltage() reaches terminate voltage . nominalavailablecapacity() and fullavailablecapacity() are the uncompensated (no or light load) versions of remainingcapacity() and fullchargecapacity(), respectively. the bq28z560-r1 has two flags accessed by the flags() function that warn when the battery?s soc has fallen to critical levels. when remainingcapacity() falls below the first capacity threshold specified in soc1 set threshold , the [soc1] (state of charge initial) flag is set. the flag is cleared once remainingcapacity() rises above soc1 clear threshold . all units are in mah. when remainingcapacity() falls below the second capacity threshold ( socf set threshold ), the [socf] (state of charge final) flag is set, serving as a final discharge warning. if socf set threshold = ?1, the flag is inoperative during discharge. similarly, when remainingcapacity() rises above socf clear threshold and the [socf] flag has already been set, the [socf] flag is cleared. all units are in mah. the bq28z560-r1 has two additional flags accessed by the flags() function that warn of internal battery conditions. the gas gauge monitors the cell voltage during relaxed conditions to determine if an internal short has been detected. when this condition occurs, [isd] will be set. the bq28z560-r1 also has the capability to detect when a tab is disconnected in a 2-cell parallel system by actively monitoring the soh . when this conditions occurs, [tdd] will be set. impedance track variables the bq28z560-r1 has several data flash variables that permit the user to customize the impedance track algorithm for optimized performance. these variables are dependent upon the power characteristics of the application as well as the cell itself. load mode load mode is used to select either the constant current mode or constant power mode for the impedance track algorithm as used in load select (see load select ). when load mode is 0, the constant current mode is used (default). when load mode is 1, constant power mode is used. the [ldmd] bit of control_status reflects the status of load mode. load select load select defines the type of power or current mode to be used to compute load-compensated capacity in the impedance track algorithm. if load mode = 0 ( constant current ), then the options presented in table 11 are available. 32 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 table 11. constant current mode used when load mode = 0 loadselect value current mode used average discharge current from previous cycle. there is an internal register that records the average discharge current through each 0 entire discharge cycle. the previous average is stored in this register. 1(default) present average discharge current. this is the average discharge current from the beginning of this discharge cycle until present time. 2 average current: based off the averagecurrent() 3 current: based off of a low-pass-filtered version of averagecurrent() ( = 14 s) 4 design capacity / 5: c rate based off of design capacity /5 or a c / 5 rate in ma 5 use the value specified by atrate() 6 use the value in user_rate-ma. this provides a completely user-configurable method. if load mode = 1 ( constant power ), then the following options are available: table 12. constant power mode used when load mode = 1 loadselect value power mode used average discharge power from the previous cycle. there is an internal register that records the average discharge power through 0 (default) each entire discharge cycle. the previous average is stored in this register. present average discharge power. this is the average discharge power from the beginning of this discharge cycle until the present 1 time. 2 average current voltage: based off the averagecurrent() and voltage() 3 current voltage: based off of a low-pass-filtered version of averagecurrent() ( = 14 s) and voltage() 4 design energy / 5: c rate based off of design energy /5 or a c / 5 rate in ma 5 use the value specified by atrate() 6 use the value in user_rate-mw/cw . this provides a completely user- configurable method. reserve cap-mah reserve cap-mah determines how much actual remaining capacity exists after reaching 0 remainingcapacity() , before terminate voltage is reached. a loaded rate or no-load rate of compensation can be selected for reserve cap by setting the [rescap] bit in the pack configuration register. reserve cap-mwh/cwh reserve cap-mwh determines how much actual remaining capacity exists after reaching 0 availableenergy(), before terminate voltage is reached. a loaded rate or no-load rate of compensation can be selected for reserve cap by setting the [rescap] bit in the pack configuration register. design energy scale design energy scale is used to select the scale/unit of a set of data flash parameters. the value of design energy scale can be either 1 or 10 only. table 13. data flash parameter scale/unit-based on design energy scale data flash design energy scale = 1 (default) design energy scale = 10 design energy mwh cwh reserve capacity ?mwh/cwh mwh cwh avg power last run mw cw user rate-mw/cw mwh cwh t rise no scale scaled by x10 dsg current threshold this register is used as a threshold by many functions in the bq28z560-r1 to determine if actual discharge current is flowing into or out of the cell. the default for this register should be sufficient for most applications. this threshold should be set low enough to be below any normal application load current but high enough to prevent noise or drift from affecting the measurement. copyright ? 2013, texas instruments incorporated submit documentation feedback 33 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com chg current threshold this register is used as a threshold by many functions in the bq28z560-r1 to determine if actual charge current is flowing into or out of the cell. the default for this register should be sufficient for most applications. this threshold should be set low enough to be below any normal charge current but high enough to prevent noise or drift from affecting the measurement. quit current, dsg relax time, chg relax time, and quit relax time the quit current is used as part of the impedance track algorithm to determine when the bq28z560-r1 enters relax mode from a current flowing mode in either the charge direction or the discharge direction. the value of quit current is set to a default value that should be above the standby current of the system. either of the following criteria must be met to enter relax mode: 1. | averagecurrent() | < | quit current | for dsg relax time . 2. | averagecurrent() | < | quit current | for chg relax time . after about 6 minutes in relax mode, the bq28z560-r1 attempts to take accurate ocv readings. an additional requirement of dv/dt < 4 v/s is required for the bq28z560-r1 to perform qmax updates. these updates are used in the impedance track algorithms. it is critical that the battery voltage be relaxed during ocv readings and that the current is not higher than c/20 when attempting to go into relax mode. quit relax time specifies the minimum time required for averagecurrent() to remain above the quitcurrent threshold before exiting relax mode. qmax qmax contains the maximum chemical capacity of the active cell profiles, and is determined by comparing states of charge before and after applying the load with the amount of charge passed. they also correspond to capacity at a low rate of discharge, such as c/20 rate. for high accuracy, this value is periodically updated by the bq28z560-r1 during operation. based on the battery cell capacity information, the initial value of chemical capacity should be entered in the qmax field. the impedance track algorithm updates this value and maintains it in the pack profile. update status the update status register indicates the status of the impedance track algorithm. table 14. update status definitions update status status qmax and ra data are learned, but impedance track is not enabled. this should be the standard setting for a 0x02 golden image. 0x04 impedance track is enabled but qmax and ra data are not learned. 0x05 impedance track is enabled and only qmax has been updated during a learning cycle. impedance track is enabled. qmax and ra data are learned after a successful learning cycle. this should be the 0x06 operation setting for end equipment. this register should only be updated by the bq28z560-r1 during a learning cycle or when it_enable() subcommand is received. refer to the application note how to generate golden image for a single-cell impedance track? device (slua544 ) for learning cycle details. avg i last run the bq28z560-r1 logs the current averaged from the beginning to the end of each discharge cycle. it stores this average current from the previous discharge cycle in this register. this register should never need to be modified. it is only updated by the bq28z560-r1 when required. 34 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 avg p last run the bq28z560-r1 logs the power averaged from the beginning to the end of each discharge cycle. it stores this average power from the previous discharge cycle in this register. to get a correct average power reading, the bq28z560-r1 continuously multiplies instantaneous current times voltage() to get power. it then logs this data to derive the average power. this register should never need to be modified. it is only updated by the bq28z560-r1 when required. delta voltage the bq28z560-r1 stores the maximum difference of voltage() during short load spikes and normal load, so the impedance track algorithm can calculate remaining capacity for pulsed loads. note it is not recommended to change this value. ra tables and ra filtering related parameters these tables contain encoded data and are automatically updated during device operation. the bq28z560-r1 has a filtering process to eliminate unexpected fluctuations in ra values while the ra values are being updated. the df parameters rafilter, ramaxdelta, maxresfactor, and minresfactor control the filtering process of ra values. ramaxdelta limits the change in ra values to an absolute magnitude. minresfactor and maxresfactor parameters are cumulative filters that limit the change in ra values to a scale on a per discharge cycle basis. these values are data flash configurable. no further user changes should be made to ra values except for reading/writing the values from a pre-learned pack (part of the process for creating golden image files). maxscalebackgrid the maxscalebackgrid parameter limits the resistance grid point after which back scaling will not be performed. this variable ensures that the resistance values in the lower resistance grid points remain accurate while the battery is at a higher dod state. max deltav, min deltav this is the maximal/minimal value allowed for delta v, which will be subtracted from simulated voltage during remaining capacity simulation. qmax max delta % this is the maximal change of qmax during one update, as a percentage of design capacity. if the gauge attempts to change the qmax value and this delta change value exceeds the qmax max delta % limit, the change value will be capped to the old value designcapacityqmaxmaxdelta/100. fast resistance scaling this new algorithm improves convergency of remaining capacity and terminates voltage at end of discharge. the algorithm is enabled when cell voltage goes below (terminate voltage + term v delta) or stateofcharge() goes below fast scale start soc. for most applications, the default value of term v delta and fast scale start soc are recommended. deltav max delta this is the maximal change of the delta v value. if an attempted change of the value exceeds this limit, the change value will be capped to the old value deltav max delta. lifetime data logging parameters note it_enable must be enabled (command 0x0021) for lifetime data logging functions to be active. copyright ? 2013, texas instruments incorporated submit documentation feedback 35 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com the lifetime data logging function helps development and diagnosis with the bq28z560-r1. the bq28z560-r1 device logs the lifetime data as specified in the lifetime data and lifetime temp samples data flash subclasses. the data log recordings are controlled by the lifetime resolution data flash subclass. the lifetime data logging can be started by setting the it_enable bit and setting the update time register to a non-zero value. once the lifetime data logging function is enabled, the measured values are compared to what is already stored in the data flash. if the measured value is higher than the maximum or lower than the minimum value stored in the data flash by more than the resolution set for at least one parameter, the entire data flash lifetime registers are updated after at least ltupdatetime. ltupdatetime sets the minimum update time between df writes. when a new max/min is detected, an lt update window of 60 seconds is enabled and the df writes occur at the end of this window. any additional max/min value detected within this window will also be updated. the first new max/min value detected after this window will trigger the next lt update window. internal to bq28z560-r1 is a ram max/min table in addition to the df max/min table. the ram table is updated independent of the resolution parameters. the df table is updated only if at least one of the ram parameters exceeds the df value by more than the resolution associated with it. when df is updated, the entire ram table is written to df. consequently, it is possible to see a new max/min value for a certain parameter even if the value of this parameter never exceeds the maximum or minimum value stored in the data flash for this parameter value by the resolution amount. the lifetime data logging of one or more parameters can be reset or restarted by writing new default (or starting) values to the corresponding data flash registers through sealed or unsealed access as described below. however, when using unsealed access, new values will only take effect after device reset. the logged data can be accessed as r/w in unsealed mode from the lifetime data subclass (subclass id=59) of data flash. lifetime data may be accessed (r/w) when sealed using a process identical in manufacturer info block b and c. the dataflashblock command code is 4. note only the first 32 bytes of lifetime data (not resolution parameters) can be r/w when sealed. see manufacturer information blocks for sealed access. the logging settings such as temperature resolution, voltage resolution, current resolution, and update time can be configured only in unsealed mode by writing to the lifetime resolution subclass (subclassid=66) of the data flash. the lifetime resolution registers contain the parameters that set the limits related to how much a data parameter must exceed the previously logged max/min value to be updated in the lifetime log. for example, v must exceed maxv by more than voltage resolution to update maxv in the data flash. detailed configuration register descriptions the pack configuration register some bq28z560-r1 pins are configured via the pack configuration data flash register, as indicated in table 15 . this register is programmed/read via the methods described in accessing the data flash . the register is located at subclass = 64, offset = 0. table 15. pack configuration bit definition bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 high byte rescap calen rsvd rsvd rsvd iwake rsns1 rsns0 low byte gndsel resfactstep sleep rmfcc clr_read alrt_pol rsvd temps 36 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 rescap = no-load rate of compensation is applied to the reserve capacity calculation. true when set. default is 0. calen = bq28z560-r1 calibration mode is enabled. default is 0. rsvd = reserved. default = 0 rsvd = reserved. default = 0. rsvd = reserved. default = 0. gndsel = the adc ground select control. the v ss (pin 6) is selected as ground reference when the bit is clear. pin 7 is selected when the bit is set. default is 0. iwake/rsns1/rsns0 = these bits configure the current wake function. default is 0/0/1. gndsel = the adc ground select control. the v ss (pin 6) is selected as ground reference when the bit is clear. pin 7 is selected when the bit is set. default is 0. resfactstep = enables ra step up/down to max/min res factor before disabling ra updates. default is 1. sleep = the gas gauge can enter sleep, if operating conditions allow. true when set. default is 1. rmfcc = rm is updated with the value from fcc, on valid charge termination. true when set. default is 1. clr_read = clear on read the fault flag register. true when set. default = 0. alrt_pol = set polarity of alert output. set to 1 means active high, so any faults detected will change output from low to high. default = 0, which means any fault detected will change output from high to low. rsvd = reserved. default = 0. temps = selects external thermistor for temperature() measurements. true when set. default is 1. pack configuration b register some bq28z560-r1 pins are configured via the pack configuration b data flash register, as indicated in table 16 . this register is programmed/read via the methods described in accessing the data flash . the register is located at subclass = 64, offset = 2. table 16. pack configuration b bit definition bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 chgdodeoc se_tdd vconsen se_isd jeita lfprelax dodwt fconven chgdodeoc = enable dod at eoc during charging only. true when set. default is 1. default setting is recommended. se_tdd = enable tab disconnection detection. true when set. default is 1. vconsen = enable voltage consistency check. true when set. default is 1. default setting is recommended. se_isd = enable internal short detection. true when set. default is 1. jeita = enable jeita temperature charging function. true when set. default is 1. lfprelax = enable lifepo4 long relax mode when chemical id 400 series is selected. true when set. default is 1. dodwt = enable dod weighting for lifepo4 support when chemical id 400 series is selected. true when set. default is 1. fconven = enable fast convergence algorithm. default is 1. default setting is recommended. pack configuration c register some bq28z560-r1 algorithm settings are configured via the pack configuration c data flash register, as indicated in table 17 . this register is programmed/read via the methods described in accessing the data flash . the register is located at subclass = 64, offset = 3. table 17. pack configuration c bit definition bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 rsvd rsvdsbs pin12f1 pin12f0 sleepwakechg chgfetterm cfet_init dfet_init rsvd = reserved. default = 0. rsvdsbs = reserved for sbs command set. true when set. default is 0. pin12f1 = in combination with pin12f0 will set the operation mode of pin 12 (see below). pin12f0 = in combination with pin12f1 will set the operation mode of pin 12 (see below). copyright ? 2013, texas instruments incorporated submit documentation feedback 37 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com sleepwakechg = if set to 1 will accumulate the charge as if it was active for 10 s ( instead of 20 s). if set, the chg fet is turned off on detecting primary charge termination. the chg fet is allowed to turn chgfetterm = back on again when rsoc < tca clear %. cfet_init= sets initial state of chg fet at reset condition. 0 = chg fet off, 1 = chg fet on. dfet_init= sets initial state of dsg fet at reset condition. 0 = dsg fet off, 1 = dsg fet on. pin12f1 pin12f0 state 0 0 nc or hdq (default) 0 1 chg fet 1 0 bat alert 1 1 rsvd battery alert default configuration register when the system is configured as an interrupt indication, the bq28z560-r1 allows settings to be configured based on which faults are or'ed for indication on the alert output table 18 . this register is programmed/read via the methods described in accessing the data flash . the register is located at subclass = 64, offset = 4. table 18. battery alert default configuration bit definition bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8 utc_en utd_en rsvd rsvd rsvd rsvd rsvd rsvd bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 otc_en otd_en bh_en bl_en rsvd soc1_en occ_en ocd_en utc_en = allows detection of under temperature charging when set to 1. default is 0. utd_em = allows detection of under temperature discharging when set to 1. default is 0. rsvd = reserved. default = 0. otc_en = allows detection of over temperature charging when set to 1. default is 0. otd_en = allows detection of over temperature discharging when set to 1. default is 0. bh_en = allows detection of battery high when set to 1. default is 0. bl_en = allows detection of battery low when set to 1. default is 0. rsvd = reserved. default = 0. soc1_en allows detection of soc low when set to 1. default is 0. occ_en = allows detection of overcurrent in charge mode when set to 1. default is 0. ocd_en = allows detection of over current in discharge mode when set to 1. default is 0. note important: the enable flags (bits 7 to 4) are the reset values. changing the data flash will not take effect until the gas gauge is re-started. read/write of the batalert_configuration i 2 c data controls the runtime alert mask. manufacturer information blocks the bq28z560-r1 contains 64 bytes of user-programmable data flash storage: manufacturer info block a and manufacturer info block b . the method for accessing these memory locations is slightly different, depending on whether the device is in unsealed or sealed modes. when in unsealed mode and when and 0x00 has been written to blockdatacontrol() , accessing the manufacturer info blocks is identical to accessing general data flash locations. first, a dataflashclass() command is used to set the subclass, then a dataflashblock() command sets the offset for the first data flash address within the subclass. the blockdata() command codes contain the referenced data flash data. when writing the data flash, a checksum is expected to be received by blockdatachecksum() . only when the checksum is received and verified is the data actually written to data flash. 38 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 as an example, the data flash location for manufacturer info block b is defined as having a subclass = 58 and an offset = 32 through 63 (32 byte block). the specification of class = system data is not needed to address manufacturer info block b , but is used instead for grouping purposes when viewing data flash info in the bq28z560-r1 evaluation software. when in sealed mode or when 0x01 blockdatacontrol() does not contain 0x00, data flash is no longer available in the manner used in unsealed mode. rather than issuing subclass information, a designated manufacturer information block is selected with the dataflashblock() command. issuing a 0x01, 0x02, or 0x03 with this command causes the corresponding information block (a, b, or c, respectively) to be transferred to the command space 0x40?0x5f for editing or reading by the system. upon successful writing of checksum information to blockdatachecksum() , the modified block is returned to data flash. note manufacturer info block a is read-only when in sealed mode. access modes the bq28z560-r1 provides three security modes (full access, unsealed, and sealed) that control data flash access permissions according to table 19 . data flash refers to those data flash locations specified in table 20 , that are accessible to the user. manufacturer information refers to the three 32-byte blocks. table 19. data flash access security mode data flash manufacturer information full access r/w r/w unsealed r/w r/w sealed none r (a); r/w (b,c) although full access and unsealed modes appear identical, only full access mode allows the bq28z560-r1 to write access-mode transition keys. sealing/unsealing data flash the bq28z560-r1 implements a key-access scheme to transition between sealed, unsealed, and full access modes. each transition requires that a unique set of two keys be sent to the bq28z560-r1 via the control() command. the keys must be sent consecutively, with no other data being written to the control register in between. note that to avoid conflict, the keys must be different from the codes presented in the cntl data column of table 4 subcommands. when in sealed mode, the [ss] bit of control_status is set; but when the unseal keys are correctly received by the bq28z560-r1, the [ss] bit is cleared. when the full-access keys are correctly received, the control_status [fas] bit is cleared. both unseal key and full-access key have two words and are stored in data flash. the first word is key 0 and the second word is key 1. the order of the keys sent to bq28z560-r1 are key 1 followed by key 0. the order of the bytes for each key entered through the control() command is the reverse of what is read from the part. for an example, if the unseal key is 0x56781234, key 1 is 0x1234 and key 0 is 0x5678. then control() should supply 0x3412 and 0x7856 to unseal the part. the unseal key and the full-access key can only be updated when in full access mode. copyright ? 2013, texas instruments incorporated submit documentation feedback 39 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com data flash summary table 20 provides a summary of data flash locations available to the user, including their default, minimum, and maximum values. table 20. data flash summary units subclass data class subclass offset name min value max value default value (evsw id type units)* configuration 1 safety current 0 oc chg i2 0 20000 6000 ma configuration 1 safety current 2 oc chg time u1 0 60 2 s configuration 1 safety current 3 oc chg recovery i2 0 20000 200 ma configuration 1 safety current 5 oc dsg i2 ?20000 0 ?6000 ma configuration 1 safety current 7 oc dsg time u1 0 60 2 s configuration 1 safety current 8 oc dsg recovery i2 ?20000 0 ?200 ma configuration 1 safety current 10 current recovery time u1 0 255 8 s configuration 2 safety temperature 0 ot chg i2 0 1200 550 0.1c configuration 2 safety temperature 2 ot chg time u1 0 60 2 s configuration 2 safety temperature 3 ot chg recovery i2 0 1200 500 0.1c configuration 2 safety temperature 5 ot dsg i2 0 1200 600 0.1c configuration 2 safety temperature 7 ot dsg time u1 0 60 2 s configuration 2 safety temperature 8 ot dsg recovery i2 0 1200 550 0.1c configuration 2 safety temperature 10 ut chg i2 -400 1200 0 0.1c configuration 2 safety temperature 12 ut chg time u1 0 60 2 s configuration 2 safety temperature 13 ut chg recovery i2 -400 1200 50 0.1c configuration 2 safety temperature 15 ut dsg i2 -400 1200 0 0.1c configuration 2 safety temperature 17 ut dsg time u1 0 60 2 s configuration 2 safety temperature 18 ut dsg recovery i2 -400 1200 50 0.1c configuration 32 charge inhibit cfg 0 chg inhibit temp low i2 ?400 1200 0 0.1c configuration 32 charge inhibit cfg 2 chg inhibit temp high i2 ?400 1200 450 0.1c configuration 32 charge inhibit cfg 4 temp hys i2 0 100 50 0.1c configuration 33 pre-charge 0 pre-charge voltage i2 0 4600 3000 mv configuration 33 pre-charge 2 pre-charge current i2 0 32767 150 ma configuration 36 charge termination 0 taper current i2 0 1000 100 ma configuration 36 charge termination 2 min taper capacity i2 0 1000 25 mah configuration 36 charge termination 4 taper voltage i2 0 1000 100 mv configuration 36 charge termination 6 current taper window u1 0 60 40 s configuration 36 charge termination 7 tca set % i1 ?1 100 99 % configuration 36 charge termination 8 tca clear % i1 ?1 100 95 % configuration 36 charge termination 9 fc set % i1 ?1 100 100 % configuration 36 charge termination 10 fc clear % i1 ?1 100 98 % configuration 36 charge termination 11 dodateoc delta t i2 0 1000 100 0.1c configuration 48 data 0 rem cap alarm i2 0 700 100 ma configuration 48 data 8 initial standby i1 ?256 0 ?10 ma configuration 48 data 9 initial maxload i2 ?32767 0 ?500 ma configuration 48 data 17 cycle count u2 0 65535 0 num configuration 48 data 19 cc threshold i2 100 32767 900 mah configuration 48 data 23 design capacity i2 0 32767 1000 ma configuration 48 data 25 design energy i2 0 32767 5400 mwh/cwh configuration 48 data 27 soh load i i2 ?32767 0 ?400 ma configuration 48 data 29 tdd soh percent i1 0 100 90 % configuration 48 data 30 ta cv t1-t2 u1 0 225 120 10 mv configuration 48 data 31 ta cv t2-t3 u1 0 225 120 10 mv configuration 48 data 32 ta cv t3-t4 u1 0 225 110 10 mv configuration 48 data 33 ta cc t1-t2 u1 0 100 10 % configuration 48 data 34 ta cc t2-t3 u1 0 100 50 % configuration 48 data 35 ta cc t3-t4 u1 0 100 30 % configuration 48 data 36 jeita t1 i1 ?128 127 0 c configuration 48 data 37 jeita t2 i1 ?128 127 10 c 40 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 table 20. data flash summary (continued) units subclass data class subclass offset name min value max value default value (evsw id type units)* configuration 48 data 38 jeita t3 i1 ?128 127 45 c configuration 48 data 39 jeita t4 i1 ?128 127 55 c configuration 48 data 40 isd current i2 0 32767 10 hourrate configuration 48 data 42 isd i filter u1 0 255 127 num configuration 48 data 43 min isd time u1 0 255 7 hour configuration 48 data 44 design energy scale u1 0 255 1 num configuration 48 data 45 device name s21 x x bq28z560-r1 ? configuration 49 discharge 0 soc1 set threshold u2 0 65535 150 mah configuration 49 discharge 2 soc1 clear threshold u2 0 65535 175 mah configuration 49 discharge 4 socf set threshold u2 0 65535 75 mah configuration 49 discharge 6 socf clear threshold u2 0 65535 100 mah configuration 49 discharge 9 bl set volt threshold i2 0 16800 0 mv configuration 49 discharge 11 bl set volt time u1 0 60 0 s configuration 49 discharge 12 bl clear volt threshold i2 0000 16800 5 mv configuration 49 discharge 14 bh set volt threshold i2 0 16800 4300 mv configuration 49 discharge 16 bh volt time u1 0 60 2 s configuration 49 discharge 17 bh clear volt threshold i2 0000 16800 5 mv configuration 56 manufacturer data 0 pack lot code h2 0x0 0xffff 0x0 ? configuration 56 manufacturer data 2 pcb lot code h2 0x0 0xffff 0x0 ? configuration 56 manufacturer data 4 firmware version h2 0x0 0xffff 0x0 ? configuration 56 manufacturer data 6 hardware revision h2 0x0 0xffff 0x0 ? configuration 56 manufacturer data 8 cell revision h2 0x0 0xffff 0x0 ? configuration 56 manufacturer data 10 df config version h2 0x0 0xffff 0x0 ? configuration 57 integrity data 6 static chem df checksum h2 0x0 0x7fff 0x0 ? system data 58 manufacturer info 0?31 block a [0?31] h1 0x0 ff 0 ? system data 58 manufacturer info 32?63 block b [0?31] h1 0x0 ff 0 ? configuration 59 lifetime data 0 lifetime max temp i2 0 1400 300 0.1c configuration 59 lifetime data 2 lifetime min temp i2 ?600 1400 200 0.1c configuration 59 lifetime data 4 lifetime max pack voltage i2 0 32767 3200 mv configuration 59 lifetime data 6 lifetime min pack voltage i2 0 32767 3500 mv configuration 59 lifetime data 8 lifetime max chg current i2 ?32767 32767 0 ma configuration 59 lifetime data 10 lifetime max dsg current i2 ?32767 32767 0 ma configuration 60 lifetime temp samples 0 lt flash cnt u2 0 65535 0 ? configuration 64 registers 0 pack configuration h2 0x0 0xffff 0x0177 ? configuration 64 registers 2 pack configuration b h1 0x0 0xff 0x1f ? configuration 64 registers 3 pack configuration c h1 0x0 0xff 0x0 ? configuration 64 registers 4 battery alert default configuration h2 0x0 0xffff c0c4 ? configuration 66 lifetime resolution 0 lt temp res u1 0 255 10 num configuration 66 lifetime resolution 1 lt v res u1 0 255 25 num configuration 66 lifetime resolution 2 lt cur res u1 0 255 100 num configuration 66 lifetime resolution 3 lt update time u2 0 65535 60 num configuration 68 power 0 flash update ok voltage i2 0 4200 2800 mv configuration 68 power 2 sleep current i2 0 100 10 ma configuration 68 power 11 hibernate i u2 0 700 8 ma configuration 68 power 13 hibernate v u2 2400 3000 2550 mv configuration 68 power 15 fs wait u1 0 255 0 s gas gauging 80 it cfg 0 load select u1 0 255 1 ? gas gauging 80 it cfg 1 load mode u1 0 255 0 ? gas gauging 80 it cfg 21 max res factor u1 0 255 15 num gas gauging 80 it cfg 22 min res factor u1 0 255 3 num gas gauging 80 it cfg 25 ra filter u2 0 1000 500 num gas gauging 80 it cfg 67 terminate voltage i2 2800 3700 3000 mv gas gauging 80 it cfg 69 term v delta i2 0 4200 200 mv gas gauging 80 it cfg 72 resrelax time u2 0 65534 200 s gas gauging 80 it cfg 76 user rate-ma i2 2000 9000 0 ma copyright ? 2013, texas instruments incorporated submit documentation feedback 41 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com table 20. data flash summary (continued) units subclass data class subclass offset name min value max value default value (evsw id type units)* gas gauging 80 it cfg 78 user rate-pwr i2 3000 14000 0 mw/cw gas gauging 80 it cfg 80 reserve cap-mah i2 0 9000 0 ma gas gauging 80 it cfg 82 reserve energy i2 0 14000 0 mwh/cwh gas gauging 80 it cfg 86 max scale back grid u1 0 15 4 ? gas gauging 80 it cfg 87 max deltav u2 0 65535 200 mv gas gauging 80 it cfg 89 min deltav u2 0 65535 0 mv gas gauging 80 it cfg 91 max sim rate u1 0 255 2 c/rate gas gauging 80 it cfg 92 min sim rate u1 0 255 20 c/rate gas gauging 80 it cfg 93 ra max delta u2 0 65535 44 m gas gauging 80 it cfg 95 qmax max delta % u1 0 100 5 mah gas gauging 80 it cfg 96 deltav max delta u2 0 65535 10 mv gas gauging 80 it cfg 102 fast scale start soc u1 0 100 10 % gas gauging 80 it cfg 103 charge hys voltage shift i2 0 2000 40 mv gas gauging 81 current thresholds 0 dsg current threshold i2 0 2000 60 ma gas gauging 81 current thresholds 2 chg current threshold i2 0 2000 75 ma gas gauging 81 current thresholds 4 quit current i2 0 1000 40 ma gas gauging 81 current thresholds 6 dsg relax time u2 0 8191 60 s gas gauging 81 current thresholds 8 chg relax time u1 0 255 60 s gas gauging 81 current thresholds 9 quit relax time u1 0 63 1 s gas gauging 81 current thresholds 10 max ir correct u2 0 1000 400 mv gas gauging 82 state 0 qmax cell 0 i2 0 32767 1000 mah gas gauging 82 state 2 cycle count u2 0 65535 0 num gas gauging 82 state 4 update status h1 0x0 0x6 0x0 ? gas gauging 82 state 5 v at chg term i2 0 5000 4200 mv gas gauging 82 state 7 avg i last run i2 ?32768 32767 ?299 ma gas gauging 82 state 9 avg p last run i2 ?32768 32767 ?1131 ma gas gauging 82 state 11 delta voltage i2 ?32768 32767 2 mv gas gauging 82 state 15 t rise i2 0 32767 0 num gas gauging 82 state 17 t time constant i2 0 32767 32767 num ocv table 83 ocva table 0 chem id h2 0x0 0xffff 0x0107 ? ra table 88 r_a0 0 cell0 r_a flag h2 0x0 0x0 0xff55 ? ra table 88 r_a0 2?30 cell0 r_a 0?14 i2 183 183 105 2 ?10 ra table 89 r_a0x 0 xcell0 r_a flag h2 0xffff 0xffff 0xffff ? ra table 89 r_a0x 2?30 xcell0 r_a 0?14 i2 183 183 105 2 ?10 calibration 104 data 0 cc gain f4 1.0e?1 4.0e+1 0.4768 num calibration 104 data 4 cc delta f4 2.9826e+4 1.193046e+ 5677445.6 num 6 calibration 104 data 8 cc offset i2 ?32768 32767 ?1200 num calibration 104 data 10 board offset i1 ?128 127 0 num calibration 104 data 11 int temp offset i1 ?128 127 0 num calibration 104 data 12 ext temp offset i1 ?128 127 0 num calibration 104 data 13 pack v offset i1 ?128 127 0 mv calibration 107 current 1 deadband u1 0 255 5 ma security 112 codes 0 sealed to unsealed h4 0x0 0xffffffff 0x36720414 ? security 112 codes 4 unsealed to full h4 0x0 0xffffffff 0xffffffff ? security 112 codes 8 authen key3 h4 0x0 0xffffffff 0x01234567 ? security 112 codes 12 authen key2 h4 0x0 0xffffffff 0x89abcdef ? security 112 codes 16 authen key1 h4 0x0 0xffffffff 0xfedcba98 ? security 112 codes 20 authen key0 h4 0x0 0xffffffff 0x76543210 ? 42 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 charging and charge termination indication detection charge termination for proper bq28z560-r1 operation, the cell charging voltage must be specified by the user. the default value for this variable is in the data flash charging voltage . the bq28z560-r1 detects charge termination when: the battery current drops below the taper current for two consecutive current taper window time periods during charging and battery voltage is equal to or higher than the charging voltage ? taper voltage . full charge is set when the taper condition is met. charge inhibit the bq28z560-r1 can indicate when battery temperature has fallen below or risen above predefined thresholds charge inhibit temp low or charge inhibit temp high . in this mode, the chg_fet bit is set in the control register to indicate this condition, and is returned to its low state once battery temperature returns to the range [charge inhibit temp low + temp hys , charge inhibit temp high ? temp hys] . this is implemented to indicate that an action is required by the battery charger. the charging should not start when the temperature is below the charge inhibit temp low or above the charge inhibit temp high . the charge fet should not turn off when temp > chg inhibit temp during charging . the gas gauge will enter charge inhibit mode only if it is in discharge mode or relax mode and temp > chg inhibit low. then it will set the charging current and charging voltage values to 0. power modes the bq28z560-r1 has four power modes: normal, sleep, hibernate, and shutdown. in normal mode, the bq28z560-r1 is fully powered and can execute any allowable task. in sleep mode, the gas gauge exists in a reduced-power state, periodically taking measurements and performing calculations. in hibernate mode, the gas gauge is in a low power state, but can be awakened by communication or certain i/o activity. the device enters shutdown mode if there is a batlow condition detected or power down of the system. figure 7 shows the relationship between these modes. the sections that follow describe the details. copyright ? 2013, texas instruments incorporated submit documentation feedback 43 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com figure 7. power mode diagram normal mode the gas gauge is in normal mode when not in any other power mode. during this mode, averagecurrent(), voltage() , and temperature() measurements are taken, and the interface data set is updated. decisions to change states are also made. this mode is exited by activating a different power mode. because the gauge consumes the most power in normal mode, the algorithm minimizes the time the gas gauge remains in this mode. note when the battery is connected for the first time, discharging may not be enabled. for this case, one of the following procedures is required: short the vm pin to the vss pin or connect the charger such that the ic returns to normal status. sleep mode sleep mode is entered automatically if the feature is enabled ( pack configuration [sleep] ) = 1) and averagecurrent() is below the programmable level sleep current . once entry into sleep mode has been qualified, but prior to entering it, the bq28z560-r1 performs an adc auto-calibration to minimize offset. 44 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 exit from sleep pack configuration [sleep ] =0 or | averagecurrent( ) | > sleep current or current is detected above i wake fuel gauging and data updated every 1 s normal fuel gauging and data updated every 20 seconds sleep disable all gas gauge subcircuits except gpio hibernate wakeup from hibernate communication activity and comm address is not for the gas gauge exit from hiberna te v bat < por threshold por exit from wait _ hibernate cell relaxed and | a veragecurrent () | < hibernate current or cell relaxed and v bat < hibernate voltage system hibernation exit from hibernate communication activity or the gas gauge clears control status [ hiberna te ] = 0 recommend host also set control status [hibernate ] = 0 wait_hibernate fuel gauging and data updated every 20 s in low-power state of sleep . mode gas gauging and data are updated every 20 s. fullsleep system sleep fullsleep count down waitfullsleep entry to fullsleep host must set control status [fullsleep ] = 1 exit from fullsleep any communication cmd exit from waitfullsleep any communication cmd entry to w aitfullsleep full sleep wait time > 0 entry to fullsleep count < 1 exit from sleep ( host has set control status [ hiberna te ] = 1 or < hibernate voltage _ exit from wait hibernate host must set control status [ hiberna te ] = 0 and > hibernate voltage entry to sleep pack configuration [ sleep ] = 1 and | averagecurrent( ) | = sleep current fuel gauge is off v = 0 v shutdown entry to shutdown no charger present system shutdown pre - shutdown fuel gauging stopped discharge fet opened i ba t = hibernate entry to pre - shutdown [shutdown ] = 1 exit from pre - shutdown communication activity or current detected > i w ake exit from shutdown charger detected and protection fet s closed v ba t ba t v bat not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 while in sleep mode, the gas gauge can suspend serial communications as much as 4 ms by holding the comm line(s) low. this delay is necessary to correctly process host communication, since the gas gauge processor is mostly halted in sleep mode. during the sleep mode, bq28z560-r1 periodically takes data measurements and updates its data set. however, a majority of its time is spent in an idle condition. the bq28z560-r1 exits sleep if any entry condition is broken, specifically when (1) averagecurrent() rises above sleep current , or (2) a current in excess of i wake through rsense is detected. fullsleep mode fullsleep mode is entered automatically if the feature is enabled by setting the configuration [fullsleep] bit in the control status register when the bq28z560-r1 is in sleep mode. the gauge exits the fullsleep mode when there is any communication activity. therefore, the execution of set_fullsleep sets the [fullsleep] bit, but evsw might still display the bit clear. fullsleep mode can be verified by measuring the current consumption of the gauge. in this mode, the high frequency oscillator is turned off. the power consumption is further reduced in this mode compared to sleep mode. fullsleep mode can also be entered by setting the full sleep wait time to be a number larger than 0. fullsleep will be entered when the timer counts down to 0. this feature is disabled when the data flash is set as 0. during fullsleep mode, the bq28z560-r1 periodically takes data measurements and updates its data set. however, a majority of its time is spent in an idle condition. the bq28z560-r1 exits sleep if any entry condition is broken, specifically when (1) averagecurrent() rises above sleep current , or (2) a current in excess of i wake through rsense is detected. while in fullsleep mode, the gas gauge can suspend serial communications as much as 4 ms by holding the comm line(s) low. this delay is necessary to correctly process host communication, since the gas gauge processor is mostly halted in sleep mode. clearing fullsleep mode fullsleep mode will stay on permanently if full sleep wait time is not set to 0. clearing fullsleep mode: ? if full sleep wait time is set to 0, the clear condition clears the flag. if it is not set to 0, the clear condition resets the timer. ? the clear condition determines that there is i 2 c communication while fullsleep is active. i 2 c communication while not in fullsleep will not clear the flag. this means if there is current flowing when the fullsleep command is sent, there is no way to clear it until after the device enters sleep mode. hibernate mode hibernate mode should be used when the host system needs to enter a low-power state, and minimal gauge power consumption is required. this mode is ideal when the host is set to its own hibernate, shutdown, or off modes. the gas gauge can enter hibernate due to either low cell voltage or low load current. ? hibernate due to the load current?if the gas gauge enters the hibernate mode due to the load current, the [hibernate] bit of the control_status register must be set. the gauge waits to enter hibernate mode until it has taken a valid ocv measurement and the magnitude of the average cell current has fallen below hibernate current. ? hibernate due to the cell voltage?when the cell voltage drops below the hibernate voltage and a valid ocv measurement has been taken, the gas gauge enters hibernate mode. the [hibernate] bit of the control register has no impact for the gas gauge to enter the hibernate mode. if the [shutdown] bit of control _status is also set. the gauge will remain in hibernate mode until communication activity appears on the communication lines. upon exiting hibernate mode, the [hibernate] bit of control_status is cleared. copyright ? 2013, texas instruments incorporated submit documentation feedback 45 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com because the gas gauge is dormant in hibernate mode, the battery should not be charged or discharged in this mode, because any changes in battery charge status will not be measured. if necessary, the host equipment can draw a small current (generally infrequent and less than 1 ma, for purposes of low-level monitoring and updating); however, the corresponding charge drawn from the battery will not be logged by the gauge. once the gauge exits to normal mode, the algorithm re-establishes the correct battery capacity. if a charger is attached, the host should immediately take the gas gauge out of hibernate mode before beginning to charge the battery. caution charging the battery in hibernate mode results in a notable gauging error that will take several hours to correct. in the hdq bus communication interface, the bus line, when in hibernate mode, must always be pulled high with an external resistor, and not allowed to go low in this mode. if the bus line is pulled low, the system may need to go through a full reset by the battery pack being removed and re-inserted. this may be an issue for systems with embedded battery packs. alternatively, disable hibernate mode by setting the clear hibernate bit to 0. another option is to set hibernate i,v settings to 0 in df commands. shutdown mode the device enters shutdown mode if there is a batlow condition detected or power down of the system. the device can also disable shutdown by using the clear_shutdown (0x0014) option. note ? a shutdown command should not be invoked if charger voltage is present. ? sending a shutdown command while charger voltage is present causes a 1?2 s time of dsg fet off, and may or may not cause a watchdog reset. (if current is 0 after the dsg fet is opened, it will attempt to shutdown and start a watchdog; otherwise, it will only clear the shutdown flag without a reset.) ? the recommendation is to not send a shutdown command if charger voltage is present. figure 8 shows an overview of the hardware controlled shutdown operation. 46 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 figure 8. shutdown operation copyright ? 2013, texas instruments incorporated submit documentation feedback 47 product folder links: bq28z560-r1 no charger charger attached normal shutdown < 2.3 v for a period of t > 24 ms over - discharge voltage dsg "off fg turn off dsg fg shutdown chg: on dsg: off vreg off chg: on dsg: on vreg: on chg: on dsg: off vreg: on chg: off dsg: off vreg: off fg turn on dsg for a period of t > 4.0 ms for a period of t > 24 ms < 2.3 v v bat v bat > 2.3 v v bat not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com operational modes power control reset functions when the bq28z560-r1 detects a software reset ([reset] bit of control() initiated), it determines the type of reset and increments the corresponding counter. this information is accessible by issuing the command control() function with the reset_data subcommand. wake-up comparator the wake up comparator is used to indicate a change in cell current while the bq28z560-r1 is in sleep mode. pack configuration uses bits [rsns1?rsns0] to set the sense resistor selection. pack configuration also uses the [iwake] bit to select one of two possible voltage threshold ranges for the given sense resistor selection. an internal interrupt is generated when the threshold is breached in either charge or discharge directions. setting both [rsns1] and [rsn0] to 0 disables this feature. table 21. iwake threshold settings (1) rsns1 rsns0 iwake vth (srp?srn) 0 0 0 disabled 0 0 1 disabled 0 1 0 +1.0 mv or ?1.0 mv 0 1 1 +2.2 mv or ?2.2 mv 1 0 0 +2.2 mv or ?2.2 mv 1 0 1 +4.6 mv or ?4.6 mv 1 1 0 +4.6 mv or ?4.6 mv 1 1 1 +9.8 mv or ?9.8 mv (1) the actual resistance value vs. the setting of the sense resistor is not important, only the actual voltage threshold when calculating the configuration. the voltage thresholds are typical values under room temperature. flash updates data flash can only be updated if voltage() > flash update ok voltage. flash programming current can cause an increase in the ldo dropout. the mode of going from one state to another is as follows: normal sleep fullsleep, then from fullsleep to either hibernate or shutdown. mode enter mode exit mode comment go into other modes like sleep, if all conditions are satisfied like in this mode, power consumption is fullsleep, hibernate, or normal average current, cell voltage, and the highest. measurements are taken shutdown if conditions are temperature. and updated every 1 s. satisfied. sleep bit set = 1 in the control change sleep bit = 0 or register and averagecurrent averagecurrent measurement > sleep the data is measured every 20 s to sleep measured is equal to sleep current current value or current detected is reduce current consumption. value. above the i wake setting. from sleep mode if the wait_fullsleep wait is the system exits the fullsleep the wait time to enter fullsleep programmed, this is the time the mode if there are any communication fullsleep from sleep is 1 s to 240 s with the system must be in sleep mode commands set on the bus to the default at 15 s. before it can go to fullsleep device. mode. 48 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 mode enter mode exit mode comment from fullsleep mode, the the system exits this mode if the v bat system will go into hibernate > programmed threshold, mode if the load current decreases or load current is > programmed enters hibernation if v bat range is to programmed value, threshold, 2.4 v to 3 v with a default at 2.55 v. hibernate or if the cell voltage falls below the or communication activity is on the the load current threshold range is 0 programmed value, bus line, to 0.7 a with a default value of 8 ma. or if the host sets the command in or the host sets the command in mac. mac. from sleep mode, the system will exit from this mode if there is bus in this mode, the vreg and dsg enter this mode if the v bat < 2.4 v activity, fet are turned off and the system for a period longer than 24 ms and or the load current detected is > shutdown will only wake up if the charger is the charger is not attached. the i wake , attached on the pack+, pack? system can also be put in or the charger is connected to the terminals. shutdown mode through mac. system. autocalibration the bq28z560-r1 provides an auto calibration feature that measures the voltage offset error across srp and srn from time-to-time as operating conditions change. it subtracts the resulting offset error from the normal sense resistor voltage, vsr, for maximum measurement accuracy. auto calibration of the adc begins on entry to sleep mode, except if temperature() is 5c or temperature() 45c. the gas gauge also performs a single offset when (1) the condition of averagecurrent() 100 ma and (2) {cell voltage change since last offset calibration 256 mv} or {temperature change since last offset calibration is greater than 80c for 60 s}. capacity and current measurements continue at the last measured rate during the offset calibration when these measurements cannot be performed. if the battery voltage drops more than 32 mv during the offset calibration, the load current has likely increased considerably and the offset calibration will be aborted. copyright ? 2013, texas instruments incorporated submit documentation feedback 49 product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com communications authentication the bq28z560-r1 can act as a sha-1/hmac authentication slave by using its internal engine. refer to the using sha-1 in bq20zxx family of gas gauges application note (slua359) for sha-1/hmac information. by sending a 160-bit sha-1 challenge message to the bq28z560-r1, it causes the gauge to return a 160-bit digest, based upon the challenge message and a hidden, 128-bit plain-text authentication key. if this digest matches an identical one generated by a host or dedicated authentication master, and when operating on the same challenge message and using the same plain text keys, the authentication process is successful. key programming (data flash key) by default, the bq28z560-r1 contains a plain-text authentication key of 0x0123456789abcdeffedcba9876543210. this default key is intended for development purposes. it should be changed to a secret key and the part immediately sealed before putting a pack into operation. once written, a new plain-text key cannot be read again from the gas gauge while in sealed mode. once the bq28z560-r1 is unsealed, the authentication key can be changed from its default value by writing to the authenticate() extended data command locations. a 0x00 is written to blockdatacontrol() to enable the authentication data commands. the dataflashclass() is issued 112 (0x70) to set the security class. up to 32 bytes of data can be read directly from the blockdata() (0x40...0x5f) and the authentication key is located at 0x48 (0x40 + 0x08 offset) to 0x57 (0x40 + 0x17 offset). the new authentication key can be written to the corresponding locations (0x48 to 0x57) using the blockdata() command. the data is transferred to the data flash when the correct checksum for the whole block (0x40 to 0x5f) is written to blockdatachecksum() (0x60). the checksum is (255 ? x) where x is the 8-bit summation of the blockdata() (0x40 to 0x5f) on a byte-by-byte basis. once the authentication key is written, the gauge can then be sealed again. key programming (the secure memory key) as the name suggests, the bq28z560-r1 secure-memory authentication key is stored in the secure memory of the bq28z560-r1. if a secure-memory key has been established and the data flash key is 0x00000000000000000000000000000000, only this key can be used for authentication challenges (the programmable data flash key is not available). the selected key can only be established/programmed by special arrangements with ti, using ti?s secure b-to-b protocol . the secure-memory key can never be changed or read from the bq28z560-r1. executing an authentication query to execute an authentication query in unsealed mode, a host must first write 0x01 to the blockdatacontrol() command to enable the authentication data commands. if in sealed mode, 0x00 must be written to dataflashblock() , instead. next, the host writes a 20-byte authentication challenge to the authenticate() address locations (0x40 through 0x53). after a valid checksum for the challenge is written to authenticatechecksum() , the bq28z560-r1 uses the challenge to perform the sha-1/hmac computation in conjunction with the programmed key. the resulting digest is written to authenticatedata() , overwriting the pre-existing challenge. the host may then read this response and compare it against the result created by its own parallel computation. hdq single-pin serial interface the hdq interface is an asynchronous return-to-one protocol where a processor sends the command code to the bq28z560-r1. with hdq, the least significant bit (lsb) of a data byte (command) or word (data) is transmitted first. note that the data signal on pin 12 is open-drain and requires an external pull-up resistor. the 8-bit command code consists of two fields: the 7-bit hdq command code (bits 0?6) and the 1-bit r/w field (msb bit 7). the r/w field directs the bq28z560-r1 to do either of the following two actions: ? store the next 8 or 16 bits of data to a specified register or, ? output 8 bits of data from the specified register. the hdq peripheral can transmit and receive data as either an hdq master or slave. 50 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 hdq serial communication is normally initiated by the host processor sending a break command to the bq28z560-r1. a break is detected when the data pin is driven to a logic-low state for a time t (b) or greater. the data pin should then be returned to its normal ready high logic state for a time t (br) . the bq28z560-r1 is now ready to receive information from the host processor. the bq28z560-r1 is shipped in the i 2 c mode. ti provides tools to enable the hdq peripheral. hdq host interruption feature the default bq28z560-r1 behaves as an hdq slave only device. if the hdq interrupt function is enabled, the bq28z560-r1 is capable of mastering and also communicating to a hdq device. there is no mechanism for negotiating who is to function as the hdq master and care must be taken to avoid message collisions. the interrupt is signaled to the host processor with the bq28z560-r1 mastering an hdq "message." this message is a fixed message that will be used to signal the interrupt condition. the message itself is 0x80 (slave write to register 0x00) with no data byte being sent as the command is not intended to convey any status of the interrupt condition. the hdq interrupt function is not public and needs to be enabled by command. when the set_hdqinten subcommand is received, the bq28z560-r1 will detect any of the interrupt conditions and assert the interrupt at 1-s intervals until the clear_hdqinten command is received or the count of hdqhostintrtries has lapsed. the number of tries for interrupting the host will be determined by the data flash parameter named configuration.register.hdqhostintrtries. the hdq host interrupt is triggered by the settings in the bat alert feature. the hdq host interrupt signal will be asserted when the flags()[alrt] bit is triggered, based on the settings in the batalertconfig() register. i 2 c interface the gas gauge supports the standard i 2 c read, incremental read, 1-byte write quick read, and functions. the 7- bit device address (addr) is the most significant 7 bits of the hex address and is fixed as 1010101. the 8-bit device address is therefore 0xaa or 0xab for write or read, respectively. figure 9. supported i 2 c formats: (a) 1-byte write, (b) quick read, ?) 1 byte-read, and (d) incremental read (s = start, sr = repeated start, a = acknowledge, n = no acknowledge, and p = stop). the "quick read" returns data at the address indicated by the address pointer. the address pointer, a register internal to the i 2 c communication engine, increments whenever data is acknowledged by the bq28z560-r1 or the i 2 c master. "quick writes" function in the same manner and are a convenient means of sending multiple bytes to consecutive command locations (such as 2-byte commands that require two bytes of data). attempt to write a read-only address (nack after data sent by master): attempt to read an address above 0x7f (nack command): attempt at incremental writes (nack all extra data bytes sent): copyright ? 2013, texas instruments incorporated submit documentation feedback 51 product folder links: bq28z560-r1 s addr[6:0] 0 a cmd[7:0] a a n p da ta[7:0] data[7:0] . . . n s addr[6:0] 0 a cmd[7:0] n p s addr[6:0] 0 a cmd[7:0] a da ta[7:0] a p s addr[6:0] 0 a cmd[7:0] a da ta[7:0] a p s addr[6:0] 1 a da ta[7:0] n p s addr[6:0] 0 a cmd[7:0] a sr addr[6:0] 1 a data[7:0] n p s addr[6:0] 0 a cmd[7:0] a sr addr[6:0] 1 a data[7:0] a . . . data[7:0] n p (d) (c) (a) (b) host generated fuel gauge generated not recommended for new designs
bq28z560-r1 slusbd3 ? april 2013 www.ti.com incremental read at the maximum allowed read address: the i 2 c engine releases both sda and scl if the i 2 c bus is held low for t (buserr) . if the gas gauge was holding the lines, releasing them frees the master to drive the lines. if an external condition is holding either of the lines low, the i 2 c engine enters the low-power sleep mode. i 2 c timeout the i 2 c engine will release both sda and scl if the i 2 c bus is held low for about 2 s. if the bq28z560-r1 was holding the lines, releasing them will free the master to drive the lines. i 2 c command waiting time to ensure getting the correct results of a command with the 400 khz i 2 c operation, a proper waiting time should be added between issuing the command and reading results. for subcommands, the following diagram shows the waiting time required between issuing the control command and reading the status with the exception of the checksum command. a 100-ms waiting time is required between the checksum command and reading result. for read-write standard commands, a minimum of 2 s is required to get the result updated. for read-only standard commands, there is no waiting time required, but the host should not issue all standard commands more than two times per second. otherwise, the gauge could result in a reset issue due to the expiration of the watchdog timer. the i 2 c clock stretch could happen in a typical application. a maximum 80-ms clock stretch could be observed during the flash updates. there can be up to a 270-ms clock stretch after the ocv command is issued. 52 submit documentation feedback copyright ? 2013, texas instruments incorporated product folder links: bq28z560-r1 a a s 0 addr[6:0] cmd[7:0] sr 1 addr[6:0] a data [7:0] a data [7:0] p n a a s a 0 p addr[6:0] cmd[7:0] data [7:0] data [7:0] a 66 m s a a s 0 addr[6:0] cmd[7:0] sr 1 addr[6:0] a data [7:0] a data [7:0] a data [7:0] a data [7:0] p n waiting time between control subcommand and reading results w aiting time between continuous reading results 66 m s 66 m s s addr[6:0] 0 a cmd[7:0] a sr addr[6:0] 1 a data[7:0] a . . . data[7:0] n p address 0x7f data from addr 0x7f data from addr 0x00 not recommended for new designs
bq28z560-r1 www.ti.com slusbd3 ? april 2013 reference schematic copyright ? 2013, texas instruments incorporated submit documentation feedback 53 product folder links: bq28z560-r1 cell+ cellC wake cout vm dout vreg pack+ packC pack+/load+ packC/loadC sda scl gnd cell+ cellC hdq gnd 1 dout 2 cout 3 vm 4 bat 5 vreg 6 vss 7 srp 8 srn 9 ts 10 sda 11 scl 12 hdq 13 pwpd u1 b q 2 8 z 5 6 0 - r 1 d rz s1 r3 100 r2 100 c3 0.1uf c4 0.1uf r4 5 m r5 5 m r6 510 c5 0.1uf c6 1uf c7 0.47uf c8 0.1uf rt1 10k 1 2 j3 1 2 3 4 j1 r10 100 r11 100 r12 100 d1 mm3z5v6c d2 r13 1k tp1 tp2 tp5 tp6 tp7 tp8 tp4 tp3 1 2 j4 r14 3.3k 1 2 j2 c1 0.1uf c2 0.1uf r1 0.005 q3-a tr-bc847bpdxv6t1 q3-b tr-bc847bpdxv6t1 r15 12k r16 5.1k r17 100k r8 3.3k 1 2 j5 1 2 j6 r9 100 r7 3.3k 1 2 3 4 j7 r18 100 d3 mm3z5v6c r19 100 q1 note: r4 and r5 must be greater than 3 m q3a, q3b , r15 to r17 ar e required if configured for cfet control. . q2 csd16340q3 1 vbus 2 dC 3 d+ 4 id 5 gnd 6 case 7 case j8 usb mini-ab 1 2 3 tb1 1 2 3 tb2 gnd side gnd side gnd side gnd side vreg hdq hdq earth_gnd earth_gnd earth_gnd earth_gnd csd16340q3 not recommended for new designs
package option addendum www.ti.com 29-aug-2014 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples BQ28Z560DRZR-R1 nrnd son drz 12 3000 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 bq28 z560 bq28z560drzt-r1 nrnd son drz 12 250 green (rohs & no sb/br) cu nipdau level-2-260c-1 year -40 to 85 bq28 z560 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release.
package option addendum www.ti.com 29-aug-2014 addendum-page 2 in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant BQ28Z560DRZR-R1 son drz 12 3000 330.0 12.4 2.8 4.3 1.2 4.0 12.0 q2 bq28z560drzt-r1 son drz 12 250 330.0 12.4 2.8 4.3 1.2 4.0 12.0 q2 package materials information www.ti.com 12-aug-2013 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) BQ28Z560DRZR-R1 son drz 12 3000 338.1 338.1 20.6 bq28z560drzt-r1 son drz 12 250 338.1 338.1 20.6 package materials information www.ti.com 12-aug-2013 pack materials-page 2

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